mirror of
https://github.com/projectacrn/acrn-hypervisor.git
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69dc939243
By switching AP wakeup from broadcast to one by one, we could set correct stack for each AP and drop the temp stack used during AP boot. Tracked-On: #2034 Signed-off-by: Yin Fengwei <fengwei.yin@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
170 lines
4.6 KiB
ArmAsm
170 lines
4.6 KiB
ArmAsm
/*
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* Copyright (C) <2018> Intel Corporation
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <vcpu.h>
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#include <spinlock.h>
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/* NOTE:
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*
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* MISRA C requires that all unsigned constants should have the suffix 'U'
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* (e.g. 0xffU), but the assembler may not accept such C-style constants. For
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* example, binutils 2.26 fails to compile assembly in that case. To work this
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* around, all unsigned constants must be explicitly spells out in assembly
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* with a comment tracking the original expression from which the magic
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* number is calculated. As an example:
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*
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* /* 0x00000668 =
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* * (CR4_DE | CR4_PAE | CR4_MCE | CR4_OSFXSR | CR4_OSXMMEXCPT) *\/
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* movl $0x00000668, %eax
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*
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* Make sure that these numbers are updated accordingly if the definition of
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* the macros involved are changed.
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*/
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.text
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.align 8
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.code64
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.extern restore_msrs
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.extern cpu_ctx
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.extern load_gdtr_and_tr
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.extern do_acpi_s3
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.global asm_enter_s3
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asm_enter_s3:
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/*
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* 0U=0x0=CPU_CONTEXT_OFFSET_RAX
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* 8U=0x8=CPU_CONTEXT_OFFSET_RCX
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* 16U=0x10=CPU_CONTEXT_OFFSET_RDX
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* 24U=0x18=CPU_CONTEXT_OFFSET_RBX
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* 32U=0x20=CPU_CONTEXT_OFFSET_RSP
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* 40U=0x28=CPU_CONTEXT_OFFSET_RBP
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* 48U=0x30=CPU_CONTEXT_OFFSET_RSI
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* 56U=0x38=CPU_CONTEXT_OFFSET_RDI
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* 64U=0x40=CPU_CONTEXT_OFFSET_R8
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* 72U=0x48=CPU_CONTEXT_OFFSET_R9
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* 80U=0x50=CPU_CONTEXT_OFFSET_R10
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* 88U=0x58=CPU_CONTEXT_OFFSET_R11
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* 96U=0x60=CPU_CONTEXT_OFFSET_R12
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* 104U=0x68=CPU_CONTEXT_OFFSET_R13
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* 112U=0x70=CPU_CONTEXT_OFFSET_R14
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* 120U=0x78=CPU_CONTEXT_OFFSET_R15
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*/
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movq %rax, 0x0 + cpu_ctx(%rip)
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movq %rcx, 0x8 + cpu_ctx(%rip)
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movq %rdx, 0x10 + cpu_ctx(%rip)
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movq %rbx, 0x18 + cpu_ctx(%rip)
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movq %rsp, 0x20 + cpu_ctx(%rip)
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movq %rbp, 0x28 + cpu_ctx(%rip)
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movq %rsi, 0x30 + cpu_ctx(%rip)
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movq %rdi, 0x38 + cpu_ctx(%rip)
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movq %r8, 0x40 + cpu_ctx(%rip)
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movq %r9, 0x48 + cpu_ctx(%rip)
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movq %r10, 0x50 + cpu_ctx(%rip)
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movq %r11, 0x58 + cpu_ctx(%rip)
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movq %r12, 0x60 + cpu_ctx(%rip)
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movq %r13, 0x68 + cpu_ctx(%rip)
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movq %r14, 0x70 + cpu_ctx(%rip)
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movq %r15, 0x78 + cpu_ctx(%rip)
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pushfq
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/*160U=0xa0=CPU_CONTEXT_OFFSET_RFLAGS*/
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popq 0xa0 + cpu_ctx(%rip)
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/*192U=0xc0=CPU_CONTEXT_OFFSET_IDTR*/
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sidt 0xc0 + cpu_ctx(%rip)
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/*216U=0xd8=CPU_CONTEXT_OFFSET_LDTR*/
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sldt 0xd8 + cpu_ctx(%rip)
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mov %cr0, %rax
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/*128U=0x80=CPU_CONTEXT_OFFSET_CR0*/
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mov %rax, 0x80 + cpu_ctx(%rip)
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mov %cr3, %rax
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/*184U=0xb8=CPU_CONTEXT_OFFSET_CR3*/
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mov %rax, 0xb8 + cpu_ctx(%rip)
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mov %cr4, %rax
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/*144U=0x90=CPU_CONTEXT_OFFSET_CR4*/
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mov %rax, 0x90 + cpu_ctx(%rip)
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wbinvd
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/*16U=0x10=CPU_CONTEXT_OFFSET_RDX*/
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movq 0x10 + cpu_ctx(%rip), %rdx /* pm1b_cnt_val */
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/*56U=0x38=CPU_CONTEXT_OFFSET_RDI*/
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movq 0x38 + cpu_ctx(%rip), %rdi /* *vm */
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/*48U=0x30=CPU_CONTEXT_OFFSET_RSI*/
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movq 0x30 + cpu_ctx(%rip), %rsi /* pm1a_cnt_val */
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call do_acpi_s3
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/*
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* When system resume from S3, trampoline_start64 will
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* jump to restore_s3_context after setup temporary stack.
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*/
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.global restore_s3_context
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restore_s3_context:
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/*144U=0x90=CPU_CONTEXT_OFFSET_CR4*/
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mov 0x90 + cpu_ctx(%rip), %rax
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mov %rax, %cr4
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/*184U=0xb8=CPU_CONTEXT_OFFSET_CR3*/
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mov 0xb8 + cpu_ctx(%rip), %rax
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mov %rax, %cr3
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/*128U=0x80=CPU_CONTEXT_OFFSET_CR0*/
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mov 0x80 + cpu_ctx(%rip), %rax
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mov %rax, %cr0
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/*192U=0xc0=CPU_CONTEXT_OFFSET_IDTR*/
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lidt 0xc0 + cpu_ctx(%rip)
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/*216U=0xd8=CPU_CONTEXT_OFFSET_LDTR*/
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lldt 0xd8 + cpu_ctx(%rip)
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/*32=0x20=CPU_CONTEXT_OFFSET_RSP*/
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movq 0x20 + cpu_ctx(%rip), %rsp
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/*160U=0xa0=CPU_CONTEXT_OFFSET_RFLAGS*/
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pushq 0xa0 + cpu_ctx(%rip)
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popfq
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stac
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call load_gdtr_and_tr
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clac
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call restore_msrs
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/*
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* 0U=0x0=CPU_CONTEXT_OFFSET_RAX
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* 8U=0x8=CPU_CONTEXT_OFFSET_RCX
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* 16U=0x10=CPU_CONTEXT_OFFSET_RDX
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* 24U=0x18=CPU_CONTEXT_OFFSET_RBX
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* 40U=0x28=CPU_CONTEXT_OFFSET_RBP
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* 48U=0x30=CPU_CONTEXT_OFFSET_RSI
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* 56U=0x38=CPU_CONTEXT_OFFSET_RDI
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* 64U=0x40=CPU_CONTEXT_OFFSET_R8
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* 72U=0x48=CPU_CONTEXT_OFFSET_R9
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* 80U=0x50=CPU_CONTEXT_OFFSET_R10
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* 88U=0x58=CPU_CONTEXT_OFFSET_R11
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* 96U=0x60=CPU_CONTEXT_OFFSET_R12
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* 104U=0x68=CPU_CONTEXT_OFFSET_R13
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* 112U=0x70=CPU_CONTEXT_OFFSET_R14
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* 120U=0x79=CPU_CONTEXT_OFFSET_R15
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*/
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movq 0x0 + cpu_ctx(%rip), %rax
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movq 0x8 + cpu_ctx(%rip), %rcx
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movq 0x10 + cpu_ctx(%rip), %rdx
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movq 0x18 + cpu_ctx(%rip), %rbx
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movq 0x28 + cpu_ctx(%rip), %rbp
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movq 0x30 + cpu_ctx(%rip), %rsi
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movq 0x38 + cpu_ctx(%rip), %rdi
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movq 0x40 + cpu_ctx(%rip), %r8
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movq 0x48 + cpu_ctx(%rip), %r9
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movq 0x50 + cpu_ctx(%rip), %r10
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movq 0x58 + cpu_ctx(%rip), %r11
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movq 0x60 + cpu_ctx(%rip), %r12
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movq 0x68 + cpu_ctx(%rip), %r13
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movq 0x70 + cpu_ctx(%rip), %r14
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movq 0x78 + cpu_ctx(%rip), %r15
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retq
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