acrn-hypervisor/hypervisor/bsp/ld/link_ram.ld.in
Yin Fengwei f3831cdc80 hv: don't combine the trampline code with AP start
Cleanup "cpu_secondary_xx" in the symbols/section/functions/variables
name in trampline code.

There is item left: the default C entry is Ap start c entry. Before
ACRN enter S3, the c entry will be updated to high level S3 C entry.
So s3 resume will go s3 resume path instead of AP startup path.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-08 13:45:02 +08:00

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#include "bsp_cfg.h"
ENTRY(cpu_primary_start_32)
MEMORY
{
/* Low 1MB of memory for secondary processor start-up */
lowram : ORIGIN = CONFIG_LOW_RAM_START, LENGTH = CONFIG_LOW_RAM_SIZE
/* 32 MBytes of RAM for HV */
ram : ORIGIN = CONFIG_RAM_START, LENGTH = CONFIG_RAM_SIZE
}
SECTIONS
{
.boot :
{
_ld_ram_start = . ;
KEEP(*(multiboot_header)) ;
} > ram
.entry :
{
KEEP(*(entry)) ;
} > ram
.text :
{
*(.text .text*) ;
*(.gnu.linkonce.t*)
*(.note.gnu.build-id)
*(.retpoline_thunk)
} > ram
.rodata :
{
*(.rodata*) ;
} > ram
_ld_trampline_load = .;
.trampline : AT (_ld_trampline_load)
{
_ld_trampline_start = .;
*(.trampline_reset);
. = ALIGN(4);
_ld_trampline_end = .;
} > lowram
_ld_trampline_size = _ld_trampline_end - _ld_trampline_start;
.data (_ld_trampline_load + _ld_trampline_size):
{
*(.data) ;
*(.data*) ;
*(.sdata)
*(.gnu.linkonce.d*)
} > ram
.bss_noinit (NOLOAD):
{
. = ALIGN(4) ;
*(.bss_noinit) ;
*(.bss_noinit*) ;
. = ALIGN(4) ;
} > ram
.bss (NOLOAD):
{
. = ALIGN(4) ;
_ld_bss_start = . ;
*(.bss) ;
*(.bss*) ;
*(COMMON) ;
. = ALIGN(4) ;
_ld_bss_end = . ;
} > ram
_ld_ram_size = LENGTH(ram) ;
_ld_ram_end = _ld_ram_size + _ld_ram_start ;
}