Yonghua Huang 442fc30117 hv: refine virtualization flow for cr0 and cr4 ...

- The current code to virtualize CR0/CR4 is not
   well designed, and hard to read.
   This patch reshuffle the logic to make it clear
   and classify those bits into PASSTHRU,
   TRAP_AND_PASSTHRU, TRAP_AND_EMULATE & reserved bits.

Tracked-On: #5586
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>

2020-12-18 11:21:22 +08:00

..

event.c

hv: reset vcpu events in reset_vcpu

2020-02-23 16:27:57 +08:00

hv_main.c

hv:add per-vm lock for vm & vcpu state change

2020-07-20 11:22:17 +08:00

hypercall.c

hv: refine virtualization flow for cr0 and cr4

2020-12-18 11:21:22 +08:00

ptdev.c

hv:unify spin_lock initialization

2020-07-02 09:40:29 +08:00

sched_bvt.c

hv: list: rename list_entry to container_of

2020-03-31 10:57:47 +08:00

sched_iorr.c

hv: sched_iorr: add some interfaces implementation of sched_iorr

2019-12-11 09:31:39 +08:00

sched_noop.c

hv: sched: decouple scheduler from schedule framework

2019-10-25 13:00:21 +08:00

schedule.c

hv: Fix thread status mess if wake_thread() happens in transition stage

2020-08-20 10:32:31 +08:00

softirq.c

softirq: move softirq from hv_main to interrupt context

2019-07-22 09:55:06 +08:00

trusty_hypercall.c

hv: rename the ACRN_DBG_XXX

2020-01-14 10:21:23 +08:00

vm_load.c

hv: remove de-privilege boot mode support and remove vboot wrappers

2020-10-21 15:09:26 +08:00