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https://github.com/projectacrn/acrn-hypervisor.git
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d93066f769
This is part of the short series of commits that will lead to a unified repository for the ACRN hypervisor, device model and the associated documentation. Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
75 lines
2.3 KiB
C
75 lines
2.3 KiB
C
/*-
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* Copyright (c) 2014 Hudson River Trading LLC
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* Written by: John H. Baldwin <jhb@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <stdio.h>
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#include <stdbool.h>
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#include "vmm.h"
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#include "vmmapi.h"
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#include "ioapic.h"
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#include "pci_core.h"
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#include "lpc.h"
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/*
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* Assign PCI INTx interrupts to I/O APIC pins in a round-robin
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* fashion. Note that we have no idea what the HPET is using, but the
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* HPET is also programmable whereas this is intended for hardwired
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* PCI interrupts.
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*
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* This assumes a single I/O APIC where pins >= 16 are permitted for
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* PCI devices.
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*/
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static int pci_pins;
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void
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ioapic_init(struct vmctx *ctx)
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{
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if (vm_ioapic_pincount(ctx, &pci_pins) < 0) {
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pci_pins = 0;
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return;
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}
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/* Ignore the first 16 pins. */
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if (pci_pins <= 16) {
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pci_pins = 0;
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return;
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}
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pci_pins -= 16;
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}
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int
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ioapic_pci_alloc_irq(struct pci_vdev *dev)
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{
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static int last_pin;
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if (pci_pins == 0)
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return -1;
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return (16 + (last_pin++ % pci_pins));
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}
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