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ACRN needs to trap the pm1a/pm1b written/read from VM0. So we could know when should we put the system to S3. We will have two path back to VM0: - S3 enter/exit sucess. Will reset VM0 and jump to VM0 wakeup vec with real mode - S3 enter/exit failed. Will return to the next instruction of pm1a/pm1b register writing. VM0 will read the pm1a/pm1b evt register to check whether it's waked up or not. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
Embedded-Hypervisor ################### This open source embedded hypervisor defines a software architecture for running multiple software subsystems managed securely on a consolidated system (by means of a virtual machine manager), and defines a reference framework Device Model implementation for devices emulation This embedded hypervisor is type-1 reference hypervisor, running directly on the system hardware. It can be used for building software defined cockpit (SDC) or In-Vehicle Experience (IVE) solutions running on Intel Architecture Apollo Lake platforms. As a reference implementation, it provides the basis for embedded hypervisor vendors to build solutions with an open source reference I/O mediation solution, and provides auto makers a reference software stack for SDC usage. This embedded hypervisor is able to support both Linux* and Android* as a Guest OS, managed by the hypervisor, where applications can run. This embedded hypervisor is a partitioning hypervisor reference stack, also suitable for non-automotive IoT & embedded device solutions. It will be addressing the gap that currently exists between datacenter hypervisors, hard partitioning hypervisors, and select industrial applications. Extending the scope of this open source embedded hypervisor relies on the involvement of community developers like you!