mirror of
https://github.com/projectacrn/acrn-hypervisor.git
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35f9680d30
Adds initial vsbi framework. Tracked-On: #8841 Signed-off-by: Haicheng Li <haicheng.li@intel.com> Signed-off-by: Yifan Liu <yifan1.liu@intel.com> Acked-by: Wang Yu1 <yu1.wang@intel.com>
106 lines
2.5 KiB
C
106 lines
2.5 KiB
C
/*
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* Copyright (C) 2018-2025 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Author: Yifan Liu <yifan1.liu@intel.com>
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* Haicheng Li <haicheng.li@intel.com>
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*/
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#include <vcpu.h>
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#include <vm.h>
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#include <cpu.h>
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#include <errno.h>
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#include <types.h>
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#include <schedule.h>
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#include <asm/trap.h>
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#include <asm/guest/vcpu_priv.h>
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#include <asm/guest/vsbi.h>
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int32_t vcpu_virtual_inst_fault_handler(struct acrn_vcpu *vcpu) {
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/* TODO: to be implemented */
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pr_err("Unhandled virtual instruction fault");
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(void)vcpu;
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cpu_dead();
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return 0;
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}
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int32_t vcpu_exit_handler(struct acrn_vcpu *vcpu)
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{
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uint64_t cause = vcpu->arch.regs.cause;
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int32_t ret;
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if ((cause & TRAP_CAUSE_INTERRUPT_BITMASK) != 0) {
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/*
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* RISC-V traps does not acknowledge the interrupt (interrupt
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* is still pending in sip). Call interrupt handler to clear
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* the pending bit.
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*/
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dispatch_interrupt((const struct intr_excp_ctx *)&(vcpu->arch.regs));
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ret = 0;
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pr_dbg("vcpu intr, cause: 0x%x, ret: %d", cause, ret);
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/* Check if we have any other interrupts pending */
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local_irq_enable();
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} else {
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local_irq_enable();
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switch (cause) {
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case TRAP_CAUSE_EXC_VIRTUAL_SUPERVISOR_ECALL:
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ret = vsbi_exit_handler(vcpu);
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break;
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case TRAP_CAUSE_EXC_VIRTUAL_INST_FAULT:
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ret = vcpu_virtual_inst_fault_handler(vcpu);
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break;
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default:
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ret = -EINVAL;
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pr_err("Unhandled trap. cause: 0x%x", cause);
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break;
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}
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pr_dbg("vcpu exc, cause: 0x%x, ret: %d", cause, ret);
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}
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return ret;
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}
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void dispatch_vcpu_trap(struct acrn_vcpu_arch *vcpu_arch)
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{
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uint16_t pcpu_id = get_pcpu_id();
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struct acrn_vcpu *vcpu = container_of(vcpu_arch, struct acrn_vcpu, arch);
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struct cpu_regs *regs = &(vcpu->arch.regs);
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struct riscv_vcpu_host_ctx *hctx = &(vcpu->arch.hctx);
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int32_t ret = -EINVAL;
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regs->hstatus = cpu_csr_read(CSR_HSTATUS);
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hctx->htval = cpu_csr_read(CSR_HTVAL);
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hctx->htinst = cpu_csr_read(CSR_HTINST);
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ret = vcpu_exit_handler(vcpu);
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if (ret < 0) {
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pr_err("Failed to handle vcpu exit. ret: %d", ret);
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}
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local_irq_disable();
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if (need_reschedule(pcpu_id)) {
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schedule();
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}
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ret = riscv_process_vcpu_requests(vcpu);
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if (ret < 0) {
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pr_fatal("Failed to process vcpu requests, pausing the vcpu");
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get_vm_lock(vcpu->vm);
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zombie_vcpu(vcpu);
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put_vm_lock(vcpu->vm);
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schedule();
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/* we'll never be scheduled in */
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}
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cpu_csr_write(CSR_HSTATUS, regs->hstatus);
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/* next trap frame saved directly to vcpu struct */
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cpu_csr_write(CSR_SSCRATCH, (uint64_t)regs);
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}
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