mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-05-01 21:23:59 +00:00
5b43521461
ACRN needs to trap the pm1a/pm1b written/read from VM0. So we could know when should we put the system to S3. We will have two path back to VM0: - S3 enter/exit sucess. Will reset VM0 and jump to VM0 wakeup vec with real mode - S3 enter/exit failed. Will return to the next instruction of pm1a/pm1b register writing. VM0 will read the pm1a/pm1b evt register to check whether it's waked up or not. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
21 lines
452 B
C
21 lines
452 B
C
/*
|
|
* Copyright (C) <2018> Intel Corporation
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#ifndef HOST_PM_H
|
|
|
|
#define BIT_SLP_TYPx 10U
|
|
#define BIT_SLP_EN 13U
|
|
#define BIT_WAK_STS 15U
|
|
|
|
extern uint8_t host_enter_s3_success;
|
|
|
|
int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
|
|
uint32_t pm1b_cnt_val);
|
|
extern void __enter_s3(struct vm *vm, uint32_t pm1a_cnt_val,
|
|
uint32_t pm1b_cnt_val);
|
|
extern void restore_s3_context(void);
|
|
|
|
#endif /* ARCH_X86_PM_H */
|