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94e1227559
There are still some misra-c violations when CONFIG_PARTITION_MODE is defined. arch/x86/configs: - remove the unused macro: PRE_LAUNCH_VM_NUM - pt_dev.c: VMx_CONFIG_PCI_PTDEV_NUM has been defined in partition_config.h, should not hard code them again in pt_dev.c. - ve820.c: use "UL" suffix instead of "U" for 64 bits variables. vmid is uint16_t in ACRN, so vuart_vmid should be uint16_t as well. Fix another few other miscellaneous misra-c violations. Tracked-On: #861 Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
40 lines
760 B
C
40 lines
760 B
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <e820.h>
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const struct e820_entry ve820_entry[E820_MAX_ENTRIES] = {
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{ /* 0 to mptable */
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.baseaddr = 0x0UL,
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.length = 0xEFFFFUL,
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.type = E820_TYPE_RAM
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},
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{ /* mptable 65536U */
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.baseaddr = 0xF0000UL,
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.length = 0x10000UL,
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.type = E820_TYPE_RESERVED
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},
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{ /* mptable to lowmem */
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.baseaddr = 0x100000UL,
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.length = 0x1FF00000UL,
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.type = E820_TYPE_RAM
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},
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{ /* lowmem to PCI hole */
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.baseaddr = 0x20000000UL,
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.length = 0xa0000000UL,
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.type = E820_TYPE_RESERVED
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},
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{ /* PCI hole to 4G */
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.baseaddr = 0xe0000000UL,
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.length = 0x20000000UL,
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.type = E820_TYPE_RESERVED
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},
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};
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