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cf524e684d
IF CAT is supported, and we want setup initial values to IA32_Type_MASK_n MSRs, We can define a global structure platform_clos_array[PLATFORM_CLOS_NUM], it has 2 members: 1.msr_index, the MSR address of IA32_Type_MASK_n 2.clos_masky, the initial valuses Global varible platform_clos_num is the number of IA32_Type_MASK_n, from IA32_Type_MASK_0 to IA32_Type_MASK_<CLOS_MAX_NUM - 1> Tracked-On: #2462 Signed-off-by: Tao Yuhong <yuhong.tao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
30 lines
564 B
C
30 lines
564 B
C
/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <board.h>
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#include <msr.h>
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struct platform_clos_info platform_clos_array[4] = {
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{
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.clos_mask = 0xff,
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.msr_index = MSR_IA32_L2_MASK_0,
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},
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{
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.clos_mask = 0xff,
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.msr_index = MSR_IA32_L2_MASK_1,
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},
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{
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.clos_mask = 0xff,
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.msr_index = MSR_IA32_L2_MASK_2,
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},
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{
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.clos_mask = 0xff,
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.msr_index = MSR_IA32_L2_MASK_3,
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},
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};
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uint16_t platform_clos_num = (uint16_t)(sizeof(platform_clos_array)/sizeof(struct platform_clos_info));
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