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https://github.com/projectacrn/acrn-hypervisor.git
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265fb56e22
VT-d code and DMAR/board.c related acrn-config tool changed in upstream. This fix adds as a bridge for backporting VT-d related changes from upstream to v1.4 Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
116 lines
4.0 KiB
Python
116 lines
4.0 KiB
Python
# Copyright (C) 2019 Intel Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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import sys
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import board_cfg_lib
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def gen_cat(config):
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"""
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Get CAT information
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:param config: it is a file pointer of board information for writing to
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"""
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err_dic = {}
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(cache_support, clos_max) = board_cfg_lib.clos_info_parser(board_cfg_lib.BOARD_INFO_FILE)
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print("\n#include <board.h>", file=config)
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print("#include <acrn_common.h>", file=config)
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print("#include <msr.h>", file=config)
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print("#include <vtd.h>", file=config)
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print("\nstruct dmar_info plat_dmar_info;", file=config)
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if cache_support == "False" or clos_max == 0:
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print("\nstruct platform_clos_info platform_clos_array[0];", file=config)
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print("uint16_t platform_clos_num = 0;", file=config)
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else:
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print("\nstruct platform_clos_info platform_clos_array[{0}] = {{".format(
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clos_max), file=config)
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for i_cnt in range(clos_max):
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print("\t{", file=config)
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print("\t\t.clos_mask = {0},".format(hex(0xff)), file=config)
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if cache_support == "L2":
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print("\t\t.msr_index = MSR_IA32_{0}_MASK_{1},".format(
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cache_support, i_cnt), file=config)
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elif cache_support == "L3":
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print("\t\t.msr_index = {0}U,".format(hex(0x00000C90+i_cnt)), file=config)
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else:
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err_dic['board config: generate board.c failed'] = "The input of {} was corrupted!".format(board_cfg_lib.BOARD_INFO_FILE)
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return err_dic
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print("\t},", file=config)
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print("};\n", file=config)
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print("uint16_t platform_clos_num = ", file=config, end="")
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print("(uint16_t)(sizeof(platform_clos_array)/sizeof(struct platform_clos_info));",
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file=config)
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print("", file=config)
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return err_dic
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def gen_single_data(data_lines, domain_str, config):
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line_i = 0
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data_statues = True
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data_len = len(data_lines)
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for data_l in data_lines:
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if line_i == 0:
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if "not available" in data_l:
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print(data_l.strip(), file=config)
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print("static const struct cpu_{}x_data board_cpu_{}x[0];".format(domain_str, domain_str), file=config)
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print("", file=config)
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data_statues = False
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break
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else:
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print("static const struct cpu_{}x_data board_cpu_{}x[{}] = {{".format(domain_str, domain_str, data_len), file=config)
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print("\t{0}".format(data_l.strip()), file=config)
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line_i += 1
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if data_statues:
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print("};\n", file=config)
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def gen_px_cx(config):
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"""
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Get Px/Cx and store them to board.c
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:param config: it is a file pointer of board information for writing to
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"""
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cpu_brand_lines = board_cfg_lib.get_info(
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board_cfg_lib.BOARD_INFO_FILE, "<CPU_BRAND>", "</CPU_BRAND>")
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cx_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE, "<CX_INFO>", "</CX_INFO>")
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px_lines = board_cfg_lib.get_info(board_cfg_lib.BOARD_INFO_FILE, "<PX_INFO>", "</PX_INFO>")
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gen_single_data(cx_lines, 'c', config)
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gen_single_data(px_lines, 'p', config)
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for brand_line in cpu_brand_lines:
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cpu_brand = brand_line
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print("const struct cpu_state_table board_cpu_state_tbl = {", file=config)
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print("\t{0},".format(cpu_brand.strip()), file=config)
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print("\t{(uint8_t)ARRAY_SIZE(board_cpu_px), board_cpu_px,", file=config)
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print("\t(uint8_t)ARRAY_SIZE(board_cpu_cx), board_cpu_cx}", file=config)
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print("};", file=config)
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def generate_file(config):
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"""
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Start to generate board.c
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:param config: it is a file pointer of board information for writing to
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"""
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err_dic = {}
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print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
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# insert bios info into board.c
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board_cfg_lib.handle_bios_info(config)
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# start to parser to get CAT info
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err_dic = gen_cat(config)
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if err_dic:
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return err_dic
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# start to parser PX/CX info
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gen_px_cx(config)
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return err_dic
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