mirror of
https://github.com/projectacrn/acrn-hypervisor.git
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28d1b909e6
1.the script will parse the the board information which already
generated, $(scenario).xml modified by user, generate scenario
vm configuration and apply to the acrn-hypervisor source code base.
2.parse cpu/memory/ttys/rootfs information from native os and store it to
the source code
3.implemnt scenario_config and it's usage
usage: scenario_cfg_gen.py --board <board_info_file> -scenario <scenario_info_file>
board_info_file : file name of the board info
scenario_info_file : file name of the scenario info
sample:
$ python3 scenario_cfg_gen.py --board ../board-xmls/apl-mrb.xml
--scenario ../config-xmls/scenarios/sdc.xml
Also improvement board config generate usage:
sample:
$ python3 board_cfg_gen.py --board ../board-xmls/apl-mrb.xml
--scenario ../config-xmls/scenarios/sdc.xml
V1-V2:
1). parse board_setting.xml was removed as these configuration will be
stitch into scenario configuration
2). parse console for different formats
3). parse epc sections
4). add logical partition rootfs
5). support to parse clos, while webui set to None type
6). support to parse bootargs, while webui set to nul
7). convert '-' to '_' for pci sub class name while generating source file
Tracked-On: #3602
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
88 lines
2.1 KiB
Python
88 lines
2.1 KiB
Python
# Copyright (C) 2019 Intel Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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import parser_lib
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CACHE_TYPE = {
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"L2":4,
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"L3":2
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}
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def dump_cpuid_reg(cmd, reg):
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"""execute the cmd of cpuid, and return the register value by reg
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:param cmd: command what can be executed in shell
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:param reg: register name
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"""
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cache_t = ''
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res = parser_lib.cmd_execute(cmd)
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if reg == "ebx":
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idx = 3
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if reg == "edx":
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idx = 5
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while True:
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line = parser_lib.decode_stdout(res)
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if not line:
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break
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if len(line.split()) <= 2:
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continue
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reg_value = line.split()[idx].split('=')[1]
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if reg == "ebx":
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if int(reg_value, 16) & CACHE_TYPE['L2'] != 0:
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cache_t = "L2"
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break
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elif int(reg_value, 16) & CACHE_TYPE['L3'] != 0:
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cache_t = "L3"
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break
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else:
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cache_t = False
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break
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elif reg == "edx":
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cache_t = int(reg_value, 16) + 1
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break
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return cache_t
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def get_clos_info():
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"""Get clos max and clos cache type"""
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clos_max = 0
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clos_cache = False
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cmd = "cpuid -r -l 0x10"
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clos_cache = dump_cpuid_reg(cmd, "ebx")
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if clos_cache == "L2":
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cmd = "cpuid -r -l 0x10 --subleaf 2"
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elif clos_cache == "L3":
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cmd = "cpuid -r -l 0x10 --subleaf 1"
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else:
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clos_max = 0
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parser_lib.print_yel("CLOS is not supported!")
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return (clos_cache, clos_max)
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clos_max = dump_cpuid_reg(cmd, "edx")
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return (clos_cache, clos_max)
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def generate_info(board_info):
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"""Generate clos information
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:param board_info: this is the file which stores the hardware board information
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"""
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(clos_cache, clos_max) = get_clos_info()
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with open(board_info, 'a+') as config:
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print("\t<CLOS_INFO>", file=config)
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print("\tclos supported by cache:{}".format(clos_cache), file=config)
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print("\tclos max:{}".format(clos_max), file=config)
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print("\t</CLOS_INFO>\n", file=config)
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