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Assign PCPU0~3 to post-launched VM. The CPU affinity can be overridden with the '--cpu_affinity' parameter of acrn-dm. v1-v2: 1) add 3 POST_STD_VM and 1 KATA_VM to industry scenario for whl-ipc/nuc7i7dnb. v2-v3: 1) remove the MAX_KATA_VM_NUM from scecnro config. 2) add gvtd args for nuc7/nuc6 board. Tracked-On: #4641 Signed-off-by: Wei Liu <weix.w.liu@intel.com> Acked-by: Victor Sun <victor.sun@intel.com>
48 lines
1.6 KiB
C
48 lines
1.6 KiB
C
/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VM_CONFIGURATIONS_H
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#define VM_CONFIGURATIONS_H
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#include <misc_cfg.h>
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/* SOS_VM_NUM can only be 0U or 1U;
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* When SOS_VM_NUM is 0U, MAX_POST_VM_NUM must be 0U too;
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* MAX_POST_VM_NUM must be bigger than CONFIG_MAX_KATA_VM_NUM;
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*/
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#define PRE_VM_NUM 0U
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#define SOS_VM_NUM 1U
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#define MAX_POST_VM_NUM 7U
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#define CONFIG_MAX_KATA_VM_NUM 1U
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/* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */
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#define DM_OWNED_GUEST_FLAG_MASK (GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \
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GUEST_FLAG_RT | GUEST_FLAG_IO_COMPLETION_POLLING)
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#define SOS_VM_BOOTARGS SOS_ROOTFS \
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"rw rootwait " \
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"console=tty0 " \
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SOS_CONSOLE \
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"consoleblank=0 " \
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"no_timer_check " \
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"quiet loglevel=3 " \
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"i915.nuclear_pageflip=1 " \
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"i915.avail_planes_per_pipe=0x01010F " \
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"i915.domain_plane_owners=0x011111110000 " \
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"i915.enable_gvt=1 " \
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SOS_IDLE \
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SOS_BOOTARGS_DIFF
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#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U))
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#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U) | AFFINITY_CPU(3U))
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#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U))
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#define VM4_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U))
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#define VM5_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U))
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#define VM6_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U))
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#define VM7_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U))
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#endif /* VM_CONFIGURATIONS_H */
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