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278 lines
9.6 KiB
ReStructuredText
278 lines
9.6 KiB
ReStructuredText
.. _sgx_virt:
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Enable SGX Virtualization
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#########################
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SGX refers to `Intel® Software Guard Extensions <https://software.intel.com/
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en-us/sgx>`_ (Intel® SGX). This is a set of instructions that can be used by
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applications to set aside protected areas for select code and data in order to
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prevent direct attacks on executing code or data stored in memory. SGX allows
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an application to instantiate a protected container, referred to as an
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enclave, which is protected against external software access, including
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privileged malware.
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High Level ACRN SGX Virtualization Design
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*****************************************
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ACRN SGX virtualization support can be divided into three parts:
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* SGX capability exposed to Guest
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* EPC (Enclave Page Cache) management
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* Enclave System function handling
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The image below shows the high-level design of SGX virtualization in ACRN.
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.. figure:: images/sgx-1.png
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:width: 500px
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:align: center
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SGX Virtualization in ACRN
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Enable SGX support for Guest
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****************************
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Presumptions
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============
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No Enclave in a Hypervisor
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--------------------------
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ACRN does not support running an enclave in a hypervisor since the whole
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hypervisor is currently running in VMX root mode, ring 0, and an enclave must
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run in ring 3. ACRN SGX virtualization in provides the capability to (non-SOS)
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VMs.
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Enable SGX on Host
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------------------
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For SGX virtualization support in ACRN, you must manually enable the SGX
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feature and configure the Processor Reserved Memory (PRM) in the platform
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BIOS. (ACRN does not support the "Software Control" option to enable SGX at
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run time.) If SGX is not enabled or the hardware platform does not support
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SGX, ACRN SGX virtualization will not be enabled.
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EPC Page Swapping in Guest
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--------------------------
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ACRN only partitions the physical EPC resources for VMs. The Guest OS kernel
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handles EPC page swapping inside Guest.
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Instructions
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============
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SGX support for a Guest OS is not enabled by default. Follow these steps to
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enable SGX support in the BIOS and in ACRN:
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#. Check the system BIOS on your target platform to see if Intel SGX is
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supported (CPUID.07H.EBX[2] should be 1).
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#. Enable the SGX feature in the BIOS setup screens. Follow these instructions:
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a) Go to the Security page:
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.. figure:: images/sgx-2.jpg
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:width: 500px
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:align: center
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#) Enable SGX and configure the SGX Reserved Memory size as below:
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* Intel Software Guard Extension (SGX) -> Enabled
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* SGX Reserved Memory Size -> 128MB
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.. figure:: images/sgx-3.jpg
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:width: 500px
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:align: center
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.. note::
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Not all SGX Reserved Memory can be used as EPC. On KBL-NUC-i7,
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the SGX EPC size is 0x5d80000 (93.5MB) when the SGX Reserved Memory
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Size is set to 128MB.
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#. Add the EPC config in the VM configuration.
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Apply the patch to enable SGX support in User VM in the SDC scenario:
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.. code-block:: bash
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$ cd <projectacrn base folder>
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$ curl https://github.com/binbinwu1/acrn-hypervisor/commit/0153b2b9b9920b61780163f19c6f5318562215ef.patch | git apply
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#. Enable SGX in Guest:
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* **For a Linux Guest**, follow these `Linux SGX build instructions
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<https://github.com/intel/linux-sgx>`_
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to build and install the SGX driver and the SGX SDK and PSW packages.
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* **For a Windows Guest**, follow these `Windows SGX build instructions
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<https://software.intel.com/en-us/articles/getting-started-with-sgx-sdk-for-windows>`_
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for enabling applications with Intel SGX using Microsoft* Visual Studio*
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2015 on a 64-bit Microsoft Windows* OS.
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SGX Capability Exposure
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***********************
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ACRN exposes SGX capability and EPC resource to a guest VM via CPUIDs and
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Processor Model-Specific Registers (MSRs), as explained in the following
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sections.
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CPUID Virtualization
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====================
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CPUID Leaf 07H
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--------------
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* CPUID_07H.EAX[2] SGX: Supports Intel Software Guard Extensions if 1. If SGX
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is supported in Guest, this bit will be set.
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* CPUID_07H.ECX[30] SGX_LC: Supports SGX Launch Configuration if 1. Currently,
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ACRN does not support the SGX Launch Configuration. This bit will not be
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set. Thus, the Launch Enclave must be signed by the Intel SGX Launch Enclave
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Key.
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CPUID Leaf 12H
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--------------
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**Intel SGX Capability Enumeration**
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* CPUID_12H.0.EAX[0] SGX1: If 1, indicates that Intel SGX supports the
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collection of SGX1 leaf functions.If is_sgx_supported and the section count
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is initialized for the VM, this bit will be set.
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* CPUID_12H.0.EAX[1] SGX2: If 1, indicates that Intel SGX supports the
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collection of SGX2 leaf functions. If hardware supports it and SGX enabled
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for the VM, this bit will be set.
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* Other fields of CPUID_12H.0.EAX aligns with the physical CPUID.
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**Intel SGX Attributes Enumeration**
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* CPUID_12H.1.EAX & CPUID_12H.1.EBX aligns with the physical CPUID.
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* CPUID_12H.1.ECX & CPUID_12H.1.EDX reflects the allow-1 setting in the
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Extended feature (same structure as XCR0).
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The hypervisor may change the allow-1 setting of XFRM in ATTRIBUTES for VM.
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If some feature is disabled for the VM, the bit is also cleared, eg. MPX.
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**Intel SGX EPC Enumeration**
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* CPUID_12H.2: The hypervisor presents only one EPC section to Guest. This
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vcpuid value will be constructed according to the EPC resource allocated to
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Guest.
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MSR Virtualization
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==================
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IA32_FEATURE_CONTROL
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--------------------
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The hypervisor will opt-in to SGX for VM if SGX is enabled for VM.
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* MSR_IA32_FEATURE_CONTROL_LOCK is set
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* MSR_IA32_FEATURE_CONTROL_SGX_GE is set
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* MSR_IA32_FEATURE_CONTROL_SGX_LC is not set
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IA32_SGXLEPUBKEYHASH[0-3]
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-------------------------
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This is read-only since SGX LC is currently not supported.
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SGXOWNEREPOCH[0-1]
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------------------
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* This is a 128-bit external entropy value for key derivation of an enclave.
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* These MSRs are at the package level; they cannot be controlled by the VM.
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EPC Virtualization
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==================
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* EPC resource is statically partitioned according to the configuration of the
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EPC size of VMs.
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* During platform initialization, the physical EPC section information is
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collected via CPUID. SGX initialization function allocates EPC resource to
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VMs according to the EPC config in VM configurations.
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* If enough EPC resource is allocated for the VM, assign the GPA of the EPC
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section.
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* EPC resource is allocated to the Non-SOS VM; the EPC base GPA is specified
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by the EPC config in the VM configuration.
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* The corresponding range of memory space should be marked as reserved in E820.
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* During initialization, the mapping relationship of EPC HPA and GPA is saved
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for building the EPT table later when the VM is created.
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Enclave System Function Handling
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********************************
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A new "Enable ENCLS exiting" control bit (bit 15) is defined in the secondary
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processor-based VM execution control.
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* 1-Setting of "Enable ENCLS exiting" enables ENCLS-exiting bitmap control,
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which is a new 64-bit ENCLS-exiting bitmap control field added to VMX VMCS (
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0202EH) to control VMEXIT on ENCLS leaf functions.
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* ACRN does not emulate ENCLS leaf functions and will not enable ENCLS exiting.
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ENCLS[ECREATE]
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==============
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* The enclave execution environment is heavily influenced by the value of
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ATTRIBUTES in the enclave's SECS.
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* When ECREATE is executed, the processor will check and verify that the
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enclave requirements are supported on the platform. If not, ECREATE will
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generate a #GP.
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* The hypervisor can present the same extended features to Guest as the
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hardware. However, if the hypervisor hides some extended features that the
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hardware supports from the VM/guest, then if the hypervisor does not trap
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ENCLS[ECREATE], ECREATE may succeed even if the ATTRIBUTES the enclave
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requested is not supported in the VM.
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* Fortunately, ENCLU[EENTER] will fault if SECS.ATTRIBUTES.XFRM is not a
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subset of XCR0 when CR4.OSXSAVE = 1.
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* XCR0 is controlled by the hypervisor in ACRN; if the hypervisor hides some
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extended feature from the VM/guest, then ENCLU[EENTER] will fault if the
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enclave requests a feature that the VM does not support if the hypervisor
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does not trap/emulate ENCLS[ECREATE].
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* Above all, the security feature is not compromised if the hypervisor does
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not trap ENCLS[ECREATE] to check the attributes of the enclave.
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Other VMExit Control
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********************
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RDRAND exiting
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==============
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* ACRN allows Guest to use RDRAND/RDSEED instruction but does not set "RDRAND
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exiting" to 1.
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PAUSE exiting
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=============
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* ACRN does not set "PAUSE exiting" to 1.
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Future Development
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******************
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Following are some currently unplanned areas of interest for future
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ACRN development around SGX virtualization.
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Launch Configuration support
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============================
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When the following two conditions are both satisfied:
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* The hardware platform supports the SGX Launch Configuration.
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* The platform BIOS must enable the feature in Unlocked mode, so that the
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ring0 software can configure the Model Specific Register (MSR)
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IA32_SGXLEPUBKEYHASH[0-3] values.
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the following statements apply:
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* If CPU sharing is supported, ACRN can emulate MSR IA32_SGXLEPUBKEYHASH[0-3]
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for VM. ACRN updates MSR IA32_SGXLEPUBKEYHASH[0-3] when the VM context
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switch happens.
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* If CPU sharing is not supported, ACRN can support SGX LC by passthrough MSR
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IA32_SGXLEPUBKEYHASH[0-3] to Guest.
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ACPI Virtualization
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===================
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* The Intel SGX EPC ACPI device is provided in the ACPI Differentiated System
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Descriptor Table (DSDT), which contains the details of the Intel SGX
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existence on the platform as well as memory size and location.
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* Although the EPC can be discovered by the CPUID, several versions of Windows
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do rely on the ACPI tables to enumerate the address and size of the EPC.
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