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b2c6cf7753
Per Section 4.4 Speculation Barriers, in "Retpoline: A Branch Target Inject Mitigation" white paper, "LFENCE instruction limits the speculative execution that a processor implementation can perform around the LFENCE, possibly impacting processor performance,but also creating a tool with which to mitigate speculative-execution side-channel attacks." Tracked-On: #4424 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
39 lines
701 B
ArmAsm
39 lines
701 B
ArmAsm
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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.macro retpoline_thunk reg:req
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.align 8
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.global __x86_indirect_thunk_\reg
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__x86_indirect_thunk_\reg:
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call 22f
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11:
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pause
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lfence
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jmp 11b
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22:
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mov %\reg, (%rsp)
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ret
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.endm
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.section .retpoline_thunk, "ax"
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retpoline_thunk rax
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retpoline_thunk rbx
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retpoline_thunk rcx
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retpoline_thunk rdx
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retpoline_thunk rdi
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retpoline_thunk rsi
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retpoline_thunk rbp
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retpoline_thunk r8
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retpoline_thunk r9
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retpoline_thunk r10
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retpoline_thunk r11
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retpoline_thunk r12
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retpoline_thunk r13
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retpoline_thunk r14
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retpoline_thunk r15
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