mirror of
https://github.com/projectacrn/acrn-hypervisor.git
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The PR 6236 has modified the board.xml format for MAX_MSIX_TABLE_NUM fix. To compromise this PR, updates all the source file board.xmls. Tracked-On: #6235 Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
941 lines
38 KiB
XML
941 lines
38 KiB
XML
<acrn-config board="whl-ipc-i7">
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<BIOS_INFO>
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BIOS Information
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Vendor: American Megatrends Inc.
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Version: WL10R104
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Release Date: 09/12/2019
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BIOS Revision: 5.13
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</BIOS_INFO>
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<BASE_BOARD_INFO>
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Base Board Information
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Manufacturer: Maxtang
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Product Name: WL10
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Version: V1.0
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</BASE_BOARD_INFO>
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<PCI_DEVICE>
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00:00.0 Host bridge: Intel Corporation Coffee Lake HOST and DRAM Controller (rev 0b)
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00:02.0 VGA compatible controller: Intel Corporation UHD Graphics 620 (Whiskey Lake)
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Region 0: Memory at a0000000 (64-bit, non-prefetchable) [size=16M]
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Region 2: Memory at 90000000 (64-bit, prefetchable) [size=256M]
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00:12.0 Signal processing controller: Intel Corporation Cannon Point-LP Thermal Controller (rev 30)
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Region 0: Memory at 400011a000 (64-bit, non-prefetchable) [size=4K]
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00:14.0 USB controller: Intel Corporation Cannon Point-LP USB 3.1 xHCI Controller (rev 30)
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Region 0: Memory at 4000100000 (64-bit, non-prefetchable) [size=64K]
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00:14.2 RAM memory: Intel Corporation Cannon Point-LP Shared SRAM (rev 30)
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Region 0: Memory at 4000114000 (64-bit, non-prefetchable) [disabled] [size=8K]
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Region 2: Memory at 4000119000 (64-bit, non-prefetchable) [disabled] [size=4K]
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00:16.0 Communication controller: Intel Corporation Cannon Point-LP MEI Controller #1 (rev 30)
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Region 0: Memory at 4000118000 (64-bit, non-prefetchable) [size=4K]
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00:17.0 SATA controller: Intel Corporation Cannon Point-LP SATA Controller [AHCI Mode] (rev 30)
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Region 0: Memory at a1300000 (32-bit, non-prefetchable) [size=8K]
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Region 1: Memory at a1303000 (32-bit, non-prefetchable) [size=256]
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Region 5: Memory at a1302000 (32-bit, non-prefetchable) [size=2K]
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00:1a.0 SD Host controller: Intel Corporation Device 9dc4 (rev 30)
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Region 0: Memory at 4000117000 (64-bit, non-prefetchable) [size=4K]
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00:1c.0 PCI bridge: Intel Corporation Cannon Point-LP PCI Express Root Port #1 (rev f0)
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00:1c.4 PCI bridge: Intel Corporation Cannon Point-LP PCI Express Root Port #5 (rev f0)
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00:1d.0 PCI bridge: Intel Corporation Cannon Point-LP PCI Express Root Port #9 (rev f0)
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00:1d.1 PCI bridge: Intel Corporation Cannon Point-LP PCI Express Root Port #10 (rev f0)
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00:1f.0 ISA bridge: Intel Corporation Cannon Point-LP LPC Controller (rev 30)
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00:1f.3 Audio device: Intel Corporation Cannon Point-LP High Definition Audio Controller (rev 30)
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Region 0: Memory at 4000110000 (64-bit, non-prefetchable) [size=16K]
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Region 4: Memory at 4000000000 (64-bit, non-prefetchable) [size=1M]
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00:1f.4 SMBus: Intel Corporation Cannon Point-LP SMBus Controller (rev 30)
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Region 0: Memory at 4000116000 (64-bit, non-prefetchable) [size=256]
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00:1f.5 Serial bus controller [0c80]: Intel Corporation Cannon Point-LP SPI Controller (rev 30)
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Region 0: Memory at fe010000 (32-bit, non-prefetchable) [size=4K]
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02:00.0 Non-Volatile memory controller: Intel Corporation SSD Pro 7600p/760p/E 6100p Series (rev 03)
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Region 0: Memory at a1200000 (64-bit, non-prefetchable) [size=16K]
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03:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)
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Region 0: Memory at a1100000 (32-bit, non-prefetchable) [size=128K]
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Region 3: Memory at a1120000 (32-bit, non-prefetchable) [size=16K]
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04:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)
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Region 0: Memory at a1000000 (32-bit, non-prefetchable) [size=128K]
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Region 3: Memory at a1020000 (32-bit, non-prefetchable) [size=16K]
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</PCI_DEVICE>
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<PCI_VID_PID>
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00:00.0 0600: 8086:3e34 (rev 0b)
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00:02.0 0300: 8086:3ea0
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00:12.0 1180: 8086:9df9 (rev 30)
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00:14.0 0c03: 8086:9ded (rev 30)
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00:14.2 0500: 8086:9def (rev 30)
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00:16.0 0780: 8086:9de0 (rev 30)
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00:17.0 0106: 8086:9dd3 (rev 30)
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00:1a.0 0805: 8086:9dc4 (rev 30)
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00:1c.0 0604: 8086:9db8 (rev f0)
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00:1c.4 0604: 8086:9dbc (rev f0)
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00:1d.0 0604: 8086:9db0 (rev f0)
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00:1d.1 0604: 8086:9db1 (rev f0)
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00:1f.0 0601: 8086:9d84 (rev 30)
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00:1f.3 0403: 8086:9dc8 (rev 30)
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00:1f.4 0c05: 8086:9da3 (rev 30)
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00:1f.5 0c80: 8086:9da4 (rev 30)
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02:00.0 0108: 8086:f1a6 (rev 03)
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03:00.0 0200: 8086:157b (rev 03)
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04:00.0 0200: 8086:157b (rev 03)
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</PCI_VID_PID>
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<WAKE_VECTOR_INFO>
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#define WAKE_VECTOR_32 0x8A8AA08CUL
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#define WAKE_VECTOR_64 0x8A8AA098UL
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</WAKE_VECTOR_INFO>
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<RESET_REGISTER_INFO>
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#define RESET_REGISTER_ADDRESS 0xCF9UL
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#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO
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#define RESET_REGISTER_VALUE 0x6U
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</RESET_REGISTER_INFO>
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<PM_INFO>
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#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_EVT_BIT_WIDTH 0x20U
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#define PM1A_EVT_BIT_OFFSET 0x0U
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#define PM1A_EVT_ADDRESS 0x1800UL
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#define PM1A_EVT_ACCESS_SIZE 0x2U
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#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_EVT_BIT_WIDTH 0x0U
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#define PM1B_EVT_BIT_OFFSET 0x0U
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#define PM1B_EVT_ADDRESS 0x0UL
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#define PM1B_EVT_ACCESS_SIZE 0x2U
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#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_CNT_BIT_WIDTH 0x10U
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#define PM1A_CNT_BIT_OFFSET 0x0U
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#define PM1A_CNT_ADDRESS 0x1804UL
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#define PM1A_CNT_ACCESS_SIZE 0x2U
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#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_CNT_BIT_WIDTH 0x0U
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#define PM1B_CNT_BIT_OFFSET 0x0U
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#define PM1B_CNT_ADDRESS 0x0UL
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#define PM1B_CNT_ACCESS_SIZE 0x2U
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</PM_INFO>
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<S3_INFO>
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</S3_INFO>
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<S5_INFO>
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#define S5_PKG_VAL_PM1A 0x7U
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#define S5_PKG_VAL_PM1B 0U
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#define S5_PKG_RESERVED 0x0U
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</S5_INFO>
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<DRHD_INFO>
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#define DRHD_COUNT 2U
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#define DRHD0_DEV_CNT 0x1U
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#define DRHD0_SEGMENT 0x0U
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#define DRHD0_FLAGS 0x0U
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#define DRHD0_REG_BASE 0xFED90000UL
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#define DRHD0_IGNORE true
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#define DRHD0_DEVSCOPE0_TYPE 0x1U
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#define DRHD0_DEVSCOPE0_ID 0x0U
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#define DRHD0_DEVSCOPE0_BUS 0x0U
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#define DRHD0_DEVSCOPE0_PATH 0x10U
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#define DRHD1_DEV_CNT 0x2U
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#define DRHD1_SEGMENT 0x0U
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#define DRHD1_FLAGS 0x1U
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#define DRHD1_REG_BASE 0xFED91000UL
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#define DRHD1_IGNORE false
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#define DRHD1_DEVSCOPE0_TYPE 0x3U
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#define DRHD1_DEVSCOPE0_ID 0x2U
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#define DRHD1_DEVSCOPE0_BUS 0x0U
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#define DRHD1_DEVSCOPE0_PATH 0xf7U
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#define DRHD1_DEVSCOPE1_TYPE 0x4U
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#define DRHD1_DEVSCOPE1_ID 0x0U
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#define DRHD1_DEVSCOPE1_BUS 0x0U
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#define DRHD1_DEVSCOPE1_PATH 0xf6U
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</DRHD_INFO>
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<CPU_BRAND>
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"Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz"
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</CPU_BRAND>
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<CX_INFO>
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{{SPACE_FFixedHW, 0x00U, 0x00U, 0x00U, 0x00UL}, 0x01U, 0x00U, 0x00U}, /* C1 */
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</CX_INFO>
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<PX_INFO>
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/* Px data is not available */
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</PX_INFO>
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<MMCFG_BASE_INFO>
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/* PCI mmcfg base of MCFG */
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#define DEFAULT_PCI_MMCFG_BASE 0xe0000000UL
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</MMCFG_BASE_INFO>
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<TPM_INFO>
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/* no TPM device */
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</TPM_INFO>
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<CLOS_INFO>
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</CLOS_INFO>
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<IOMEM_INFO>
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00000000-00000fff : Reserved
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00001000-0005efff : System RAM
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0005f000-0005ffff : Reserved
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00060000-0009ffff : System RAM
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000a0000-000fffff : Reserved
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000a0000-000bffff : PCI Bus 0000:00
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000c0000-000cffff : Video ROM
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000f0000-000fffff : System ROM
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00100000-3fffffff : System RAM
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40000000-403fffff : Reserved
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40000000-403fffff : pnp 00:00
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40400000-82339017 : System RAM
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82339018-82349657 : System RAM
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82349658-8234a017 : System RAM
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8234a018-8235a057 : System RAM
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8235a058-835c8fff : System RAM
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835c9000-835c9fff : ACPI Non-volatile Storage
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835ca000-835cafff : Reserved
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835cb000-89f8cfff : System RAM
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89f8d000-8a3f8fff : Reserved
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8a3f9000-8a475fff : ACPI Tables
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8a476000-8a8aafff : ACPI Non-volatile Storage
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8a8ab000-8aefefff : Reserved
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8aeff000-8aefffff : System RAM
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8af00000-8fffffff : Reserved
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8c000000-8fffffff : Graphics Stolen Memory
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90000000-dfffffff : PCI Bus 0000:00
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90000000-9fffffff : 0000:00:02.0
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a0000000-a0ffffff : 0000:00:02.0
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a1000000-a10fffff : PCI Bus 0000:04
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a1000000-a101ffff : 0000:04:00.0
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a1000000-a101ffff : igb
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a1020000-a1023fff : 0000:04:00.0
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a1020000-a1023fff : igb
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a1100000-a11fffff : PCI Bus 0000:03
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a1100000-a111ffff : 0000:03:00.0
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a1100000-a111ffff : igb
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a1120000-a1123fff : 0000:03:00.0
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a1120000-a1123fff : igb
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a1200000-a12fffff : PCI Bus 0000:02
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a1200000-a1203fff : 0000:02:00.0
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a1200000-a1203fff : nvme
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a1300000-a1301fff : 0000:00:17.0
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a1300000-a1301fff : ahci
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a1302000-a13027ff : 0000:00:17.0
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a1302000-a13027ff : ahci
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a1303000-a13030ff : 0000:00:17.0
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a1303000-a13030ff : ahci
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e0000000-efffffff : PCI MMCONFIG 0000 [bus 00-ff]
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e0000000-efffffff : Reserved
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e0000000-efffffff : pnp 00:0d
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fc800000-fe7fffff : PCI Bus 0000:00
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fd000000-fd69ffff : pnp 00:0e
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fd6a0000-fd6affff : pnp 00:10
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fd6b0000-fd6cffff : pnp 00:0e
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fd6d0000-fd6dffff : pnp 00:10
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fd6e0000-fd6effff : pnp 00:10
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fd6f0000-fdffffff : pnp 00:0e
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fe000000-fe010fff : Reserved
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fe010000-fe010fff : 0000:00:1f.5
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fe200000-fe7fffff : pnp 00:0e
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fec00000-fec00fff : Reserved
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fec00000-fec003ff : IOAPIC 0
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fed00000-fed003ff : HPET 0
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fed00000-fed003ff : PNP0103:00
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fed10000-fed17fff : pnp 00:0d
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fed18000-fed18fff : pnp 00:0d
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fed19000-fed19fff : pnp 00:0d
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fed20000-fed3ffff : pnp 00:0d
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fed45000-fed8ffff : pnp 00:0d
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fed90000-fed90fff : dmar0
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fed91000-fed91fff : dmar1
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fee00000-fee00fff : Local APIC
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fee00000-fee00fff : Reserved
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ff000000-ffffffff : Reserved
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ff000000-ffffffff : pnp 00:0e
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100000000-26dffffff : System RAM
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1b7400000-1b8200db6 : Kernel code
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1b8400000-1b893afff : Kernel rodata
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1b8a00000-1b8c80cbf : Kernel data
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1b8f37000-1b93fffff : Kernel bss
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26e000000-26fffffff : RAM buffer
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4000000000-7fffffffff : PCI Bus 0000:00
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4000000000-40000fffff : 0000:00:1f.3
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4000000000-40000fffff : ICH HD audio
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4000100000-400010ffff : 0000:00:14.0
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4000100000-400010ffff : xhci-hcd
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4000110000-4000113fff : 0000:00:1f.3
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4000110000-4000113fff : ICH HD audio
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4000114000-4000115fff : 0000:00:14.2
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4000116000-40001160ff : 0000:00:1f.4
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4000117000-4000117fff : 0000:00:1a.0
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4000117000-4000117fff : mmc0
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4000118000-4000118fff : 0000:00:16.0
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4000118000-4000118fff : mei_me
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4000119000-4000119fff : 0000:00:14.2
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400011a000-400011afff : 0000:00:12.0
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400011a000-400011afff : Intel PCH thermal driver
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</IOMEM_INFO>
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<BLOCK_DEVICE_INFO>
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/dev/sda3: TYPE="ext4"
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/dev/nvme0n1p2: TYPE="ext4"
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</BLOCK_DEVICE_INFO>
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<TTYS_INFO>
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seri:/dev/ttyS0 type:portio base:0x3F8 irq:4
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seri:/dev/ttyS1 type:portio base:0x2F8 irq:3
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seri:/dev/ttyS2 type:portio base:0x3E8 irq:7
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seri:/dev/ttyS3 type:portio base:0x2E8 irq:7
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seri:/dev/ttyS4 type:portio base:0x2F0 irq:7
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seri:/dev/ttyS5 type:portio base:0x2E0 irq:7
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</TTYS_INFO>
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<AVAILABLE_IRQ_INFO>
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6, 10, 11, 13, 14, 15
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</AVAILABLE_IRQ_INFO>
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<TOTAL_MEM_INFO>
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8016676 kB
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</TOTAL_MEM_INFO>
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<CPU_PROCESSOR_INFO>
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0, 1, 2, 3
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</CPU_PROCESSOR_INFO>
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<MAX_MSIX_TABLE_NUM>
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16
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</MAX_MSIX_TABLE_NUM>
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<processors>
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<model description="Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz">
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<family_id>0x6</family_id>
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<model_id>0x8e</model_id>
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<core_type></core_type>
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<native_model_id></native_model_id>
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<capability id="sse3"/>
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<capability id="pclmulqdq"/>
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<capability id="dtes64"/>
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<capability id="monitor"/>
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<capability id="ds_cpl"/>
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<capability id="vmx"/>
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<capability id="est"/>
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<capability id="tm2"/>
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<capability id="ssse3"/>
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<capability id="sdbg"/>
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<capability id="fma"/>
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<capability id="cmpxchg16b"/>
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<capability id="xtpr"/>
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<capability id="pdcm"/>
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|
<capability id="pcid"/>
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<capability id="sse4_1"/>
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<capability id="sse4_2"/>
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|
<capability id="x2apic"/>
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|
<capability id="movbe"/>
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|
<capability id="popcnt"/>
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<capability id="tsc_deadline"/>
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<capability id="aes"/>
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<capability id="xsave"/>
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<capability id="avx"/>
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|
<capability id="f16c"/>
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|
<capability id="rdrand"/>
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|
<capability id="fpu"/>
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|
<capability id="vme"/>
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|
<capability id="de"/>
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|
<capability id="pse"/>
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<capability id="tsc"/>
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|
<capability id="msr"/>
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|
<capability id="pae"/>
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|
<capability id="mce"/>
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|
<capability id="cx8"/>
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|
<capability id="apic"/>
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|
<capability id="sep"/>
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|
<capability id="mtrr"/>
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|
<capability id="pge"/>
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|
<capability id="mca"/>
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|
<capability id="cmov"/>
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|
<capability id="pat"/>
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|
<capability id="pse36"/>
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|
<capability id="clfsh"/>
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|
<capability id="ds"/>
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|
<capability id="acpi"/>
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<capability id="mmx"/>
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|
<capability id="fxsr"/>
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|
<capability id="sse"/>
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|
<capability id="sse2"/>
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|
<capability id="ss"/>
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|
<capability id="htt"/>
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|
<capability id="tm"/>
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|
<capability id="pbe"/>
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|
<capability id="fsgsbase"/>
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|
<capability id="ia32_tsc_adjust_msr"/>
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|
<capability id="sgx"/>
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|
<capability id="bmi1"/>
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|
<capability id="avx2"/>
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|
<capability id="smep"/>
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|
<capability id="bmi2"/>
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|
<capability id="erms"/>
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|
<capability id="invpcid"/>
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|
<capability id="deprecate_fpu"/>
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|
<capability id="mpx"/>
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|
<capability id="rdseed"/>
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|
<capability id="adx"/>
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|
<capability id="smap"/>
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|
<capability id="clflushopt"/>
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|
<capability id="intel_pt"/>
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|
<capability id="md_clear"/>
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|
<capability id="ibrs_ibpb"/>
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|
<capability id="stibp"/>
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|
<capability id="l1d_flush"/>
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<capability id="ia32_arch_capabilities"/>
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|
<capability id="ssbd"/>
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|
<capability id="lahf_sahf_64"/>
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|
<capability id="lzcnt"/>
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|
<capability id="prefetchw"/>
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|
<capability id="syscall_sysret_64"/>
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|
<capability id="execute_disable"/>
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|
<capability id="gbyte_pages"/>
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|
<capability id="rdtscp_ia32_tsc_aux"/>
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<capability id="intel_64"/>
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<capability id="invariant_tsc"/>
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</model>
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<die id="0">
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<core id="0x0">
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<thread id="0x0">
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<cpu_id>0</cpu_id>
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<apic_id>0x0</apic_id>
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|
<x2apic_id>0x0</x2apic_id>
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<family_id>0x6</family_id>
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<model_id>0x8e</model_id>
|
|
<stepping_id>0xb</stepping_id>
|
|
<core_type></core_type>
|
|
<native_model_id></native_model_id>
|
|
</thread>
|
|
</core>
|
|
<core id="0x1">
|
|
<thread id="0x2">
|
|
<cpu_id>1</cpu_id>
|
|
<apic_id>0x2</apic_id>
|
|
<x2apic_id>0x2</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x8e</model_id>
|
|
<stepping_id>0xb</stepping_id>
|
|
<core_type></core_type>
|
|
<native_model_id></native_model_id>
|
|
</thread>
|
|
</core>
|
|
<core id="0x2">
|
|
<thread id="0x4">
|
|
<cpu_id>2</cpu_id>
|
|
<apic_id>0x4</apic_id>
|
|
<x2apic_id>0x4</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x8e</model_id>
|
|
<stepping_id>0xb</stepping_id>
|
|
<core_type></core_type>
|
|
<native_model_id></native_model_id>
|
|
</thread>
|
|
</core>
|
|
<core id="0x3">
|
|
<thread id="0x6">
|
|
<cpu_id>3</cpu_id>
|
|
<apic_id>0x6</apic_id>
|
|
<x2apic_id>0x6</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x8e</model_id>
|
|
<stepping_id>0xb</stepping_id>
|
|
<core_type></core_type>
|
|
<native_model_id></native_model_id>
|
|
</thread>
|
|
</core>
|
|
</die>
|
|
</processors>
|
|
<caches>
|
|
<cache level="1" id="0x0" type="1">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
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|
<sets>64</sets>
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|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x0" type="2">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x1" type="1">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x2</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x1" type="2">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x2</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x2" type="1">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x4</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x2" type="2">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x4</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x3" type="1">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x6</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x3" type="2">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x6</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="2" id="0x0" type="3">
|
|
<cache_size>262144</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>4</ways>
|
|
<sets>1024</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="2" id="0x1" type="3">
|
|
<cache_size>262144</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>4</ways>
|
|
<sets>1024</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x2</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="2" id="0x2" type="3">
|
|
<cache_size>262144</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>4</ways>
|
|
<sets>1024</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x4</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="2" id="0x3" type="3">
|
|
<cache_size>262144</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>4</ways>
|
|
<sets>1024</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x6</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="3" id="0x0" type="3">
|
|
<cache_size>8388608</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>8192</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>1</cache_inclusiveness>
|
|
<complex_cache_indexing>1</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
<processor>0x2</processor>
|
|
<processor>0x4</processor>
|
|
<processor>0x6</processor>
|
|
</processors>
|
|
</cache>
|
|
</caches>
|
|
<memory>
|
|
<range start="0x0000000000000000" end="0x000000000005efff" size="389120"/>
|
|
<range start="0x0000000000060000" end="0x000000000009ffff" size="262144"/>
|
|
<range start="0x0000000000100000" end="0x000000003fffffff" size="1072693248"/>
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|
<range start="0x0000000040400000" end="0x00000000835c8fff" size="1125945344"/>
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|
<range start="0x00000000835cb000" end="0x0000000089f8cfff" size="110895104"/>
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|
<range start="0x000000008aeff000" end="0x000000008aefffff" size="4096"/>
|
|
<range start="0x0000000100000000" end="0x000000026dffffff" size="6140461056"/>
|
|
</memory>
|
|
<devices>
|
|
<bus type="pci" address="0x0" id="0x3e34" description="Host bridge: Intel Corporation Coffee Lake HOST and DRAM Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x3e34</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x060000</class>
|
|
<resource type="memory" min="0xa0000" max="0xbffff" len="0x20000"/>
|
|
<resource type="memory" min="0x90000000" max="0xdfffffff" len="0x50000000"/>
|
|
<resource type="memory" min="0xfc800000" max="0xfe7fffff" len="0x2000000"/>
|
|
<resource type="memory" min="0x4000000000" max="0x7fffffffff" len="0x4000000000"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<device address="0x20000" id="0x3ea0" description="VGA compatible controller: Intel Corporation UHD Graphics 620 (Whiskey Lake)">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x3ea0</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x2212</subsystem_identifier>
|
|
<class>0x030000</class>
|
|
<resource type="io_port" min="0x5000" max="0x503f" len="0x40" id="bar4"/>
|
|
<resource type="memory" min="0x90000000" max="0x9fffffff" len="0x10000000" id="bar2" width="64" prefetchable="1"/>
|
|
<resource type="memory" min="0xa0000000" max="0xa0ffffff" len="0x1000000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
</capability>
|
|
<capability id="Power Management"/>
|
|
<capability id="PASID"/>
|
|
<capability id="ATS"/>
|
|
<capability id="PRI"/>
|
|
</device>
|
|
<device address="0x120000" id="0x9df9" description="Signal processing controller: Intel Corporation Cannon Point-LP Thermal Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9df9</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x118000</class>
|
|
<resource type="memory" min="0x400011a000" max="0x400011afff" len="0x1000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
</capability>
|
|
</device>
|
|
<device address="0x140000" id="0x9ded" description="USB controller: Intel Corporation Cannon Point-LP USB 3.1 xHCI Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9ded</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x0c0330</class>
|
|
<resource type="memory" min="0x4000100000" max="0x400010ffff" len="0x10000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="MSI">
|
|
<count>8</count>
|
|
<capability id="multiple-message"/>
|
|
<capability id="64-bit address"/>
|
|
</capability>
|
|
<capability id="Vendor-Specific"/>
|
|
</device>
|
|
<device address="0x140002" id="0x9def" description="RAM memory: Intel Corporation Cannon Point-LP Shared SRAM">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9def</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x050000</class>
|
|
<resource type="memory" min="0x4000114000" max="0x4000115fff" len="0x2000" id="bar0" width="64" prefetchable="0"/>
|
|
<resource type="memory" min="0x4000119000" max="0x4000119fff" len="0x1000" id="bar2" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
</device>
|
|
<device address="0x160000" id="0x9de0" description="Communication controller: Intel Corporation Cannon Point-LP MEI Controller #1">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9de0</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x078000</class>
|
|
<resource type="memory" min="0x4000118000" max="0x4000118fff" len="0x1000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
</capability>
|
|
<capability id="Vendor-Specific"/>
|
|
</device>
|
|
<device address="0x170000" id="0x9dd3" description="SATA controller: Intel Corporation Cannon Point-LP SATA Controller [AHCI Mode]">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9dd3</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x010601</class>
|
|
<resource type="io_port" min="0x5060" max="0x507f" len="0x20" id="bar4"/>
|
|
<resource type="io_port" min="0x5080" max="0x5083" len="0x4" id="bar3"/>
|
|
<resource type="io_port" min="0x5090" max="0x5097" len="0x8" id="bar2"/>
|
|
<resource type="memory" min="0xa1300000" max="0xa1301fff" len="0x2000" id="bar0" width="32" prefetchable="0"/>
|
|
<resource type="memory" min="0xa1302000" max="0xa13027ff" len="0x800" id="bar5" width="32" prefetchable="0"/>
|
|
<resource type="memory" min="0xa1303000" max="0xa13030ff" len="0x100" id="bar1" width="32" prefetchable="0"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
</capability>
|
|
<capability id="Power Management"/>
|
|
<capability id="Reserved (0x12)"/>
|
|
</device>
|
|
<device address="0x1a0000" id="0x9dc4" description="SD Host controller: Intel Corporation">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9dc4</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x080501</class>
|
|
<resource type="memory" min="0x4000117000" max="0x4000117fff" len="0x1000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Vendor-Specific"/>
|
|
</device>
|
|
<device address="0x1c0000" id="0x9db8" description="PCI bridge: Intel Corporation Cannon Point-LP PCI Express Root Port #1">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9db8</identifier>
|
|
<class>0x060400</class>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Power Management"/>
|
|
<bus type="pci" address="0x1"/>
|
|
</device>
|
|
<device address="0x1c0004" id="0x9dbc" description="PCI bridge: Intel Corporation Cannon Point-LP PCI Express Root Port #5">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9dbc</identifier>
|
|
<class>0x060400</class>
|
|
<resource type="memory" min="0xa1200000" max="0xa12fffff" len="0x100000"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<capability id="TPM"/>
|
|
<capability id="Secondary PCI Express"/>
|
|
<capability id="DPC"/>
|
|
<bus type="pci" address="0x2">
|
|
<device address="0x0" id="0xf1a6" description="Non-Volatile memory controller: Intel Corporation SSD Pro 7600p/760p/E 6100p Series">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0xf1a6</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x390b</subsystem_identifier>
|
|
<class>0x010802</class>
|
|
<resource type="memory" min="0xa1200000" max="0xa1203fff" len="0x4000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="MSI">
|
|
<count>8</count>
|
|
<capability id="multiple-message"/>
|
|
<capability id="64-bit address"/>
|
|
<capability id="per-vector masking"/>
|
|
</capability>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI-X">
|
|
<table_size>16</table_size>
|
|
<table_bir>1</table_bir>
|
|
<table_offset>0x1000000</table_offset>
|
|
<pba_bir>1</pba_bir>
|
|
<pba_offset>0x0</pba_offset>
|
|
</capability>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="Secondary PCI Express"/>
|
|
<capability id="LTR"/>
|
|
<capability id="L1 PM Substates"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x1d0000" id="0x9db0" description="PCI bridge: Intel Corporation Cannon Point-LP PCI Express Root Port #9">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9db0</identifier>
|
|
<class>0x060400</class>
|
|
<resource type="io_port" min="0x4000" max="0x4fff" len="0x1000"/>
|
|
<resource type="memory" min="0xa1100000" max="0xa11fffff" len="0x100000"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<capability id="TPM"/>
|
|
<capability id="Secondary PCI Express"/>
|
|
<capability id="DPC"/>
|
|
<bus type="pci" address="0x3">
|
|
<device address="0x0" id="0x157b" description="Ethernet controller: Intel Corporation I210 Gigabit Network Connection">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x157b</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x0000</subsystem_identifier>
|
|
<class>0x020000</class>
|
|
<resource type="io_port" min="0x4000" max="0x401f" len="0x20" id="bar2"/>
|
|
<resource type="memory" min="0xa1100000" max="0xa111ffff" len="0x20000" id="bar0" width="32" prefetchable="0"/>
|
|
<resource type="memory" min="0xa1120000" max="0xa1123fff" len="0x4000" id="bar3" width="32" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
<capability id="per-vector masking"/>
|
|
</capability>
|
|
<capability id="MSI-X">
|
|
<table_size>5</table_size>
|
|
<table_bir>7</table_bir>
|
|
<table_offset>0x30000</table_offset>
|
|
<pba_bir>1</pba_bir>
|
|
<pba_offset>0x0</pba_offset>
|
|
</capability>
|
|
<capability id="PCI Express"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="Device Serial Number"/>
|
|
<capability id="TPH Requester"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x1d0001" id="0x9db1" description="PCI bridge: Intel Corporation Cannon Point-LP PCI Express Root Port #10">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9db1</identifier>
|
|
<class>0x060400</class>
|
|
<resource type="io_port" min="0x3000" max="0x3fff" len="0x1000"/>
|
|
<resource type="memory" min="0xa1000000" max="0xa10fffff" len="0x100000"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<capability id="TPM"/>
|
|
<capability id="Secondary PCI Express"/>
|
|
<capability id="DPC"/>
|
|
<bus type="pci" address="0x4">
|
|
<device address="0x0" id="0x157b" description="Ethernet controller: Intel Corporation I210 Gigabit Network Connection">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x157b</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x0000</subsystem_identifier>
|
|
<class>0x020000</class>
|
|
<resource type="io_port" min="0x3000" max="0x301f" len="0x20" id="bar2"/>
|
|
<resource type="memory" min="0xa1000000" max="0xa101ffff" len="0x20000" id="bar0" width="32" prefetchable="0"/>
|
|
<resource type="memory" min="0xa1020000" max="0xa1023fff" len="0x4000" id="bar3" width="32" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
<capability id="per-vector masking"/>
|
|
</capability>
|
|
<capability id="MSI-X">
|
|
<table_size>5</table_size>
|
|
<table_bir>7</table_bir>
|
|
<table_offset>0x30000</table_offset>
|
|
<pba_bir>1</pba_bir>
|
|
<pba_offset>0x0</pba_offset>
|
|
</capability>
|
|
<capability id="PCI Express"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="Device Serial Number"/>
|
|
<capability id="TPH Requester"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x1f0000" id="0x9d84" description="ISA bridge: Intel Corporation Cannon Point-LP LPC Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9d84</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x060100</class>
|
|
</device>
|
|
<device address="0x1f0003" id="0x9dc8" description="Audio device: Intel Corporation Cannon Point-LP High Definition Audio Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9dc8</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x040300</class>
|
|
<resource type="memory" min="0x4000000000" max="0x40000fffff" len="0x100000" id="bar4" width="64" prefetchable="0"/>
|
|
<resource type="memory" min="0x4000110000" max="0x4000113fff" len="0x4000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
</capability>
|
|
</device>
|
|
<device address="0x1f0004" id="0x9da3" description="SMBus: Intel Corporation Cannon Point-LP SMBus Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9da3</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x0c0500</class>
|
|
<resource type="io_port" min="0xefa0" max="0xefbf" len="0x20" id="bar4"/>
|
|
<resource type="memory" min="0x4000116000" max="0x40001160ff" len="0x100" id="bar0" width="64" prefetchable="0"/>
|
|
</device>
|
|
<device address="0x1f0005" id="0x9da4" description="Serial bus controller: Intel Corporation Cannon Point-LP SPI Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x9da4</identifier>
|
|
<subsystem_vendor>0x8086</subsystem_vendor>
|
|
<subsystem_identifier>0x7270</subsystem_identifier>
|
|
<class>0x0c8000</class>
|
|
<resource type="memory" min="0xfe010000" max="0xfe010fff" len="0x1000" id="bar0" width="32" prefetchable="0"/>
|
|
</device>
|
|
</bus>
|
|
</devices>
|
|
</acrn-config>
|