acrn-hypervisor/hypervisor/include/arch/x86/asm/irq.h
Shuo A Liu 9c910bae44 hv: dm: Use new I/O request data structures
struct vhm_request		->	struct acrn_io_request
union vhm_request_buffer	->	struct acrn_io_request_buffer
struct pio_request		->	struct acrn_pio_request
struct mmio_request		->	struct acrn_mmio_request
struct ioreq_notify		->	struct acrn_ioreq_notify

VHM_REQ_PIO_INVAL		->	IOREQ_PIO_INVAL
VHM_REQ_MMIO_INVAL		->	IOREQ_MMIO_INVAL
REQ_PORTIO			->	ACRN_IOREQ_TYPE_PORTIO
REQ_MMIO			->	ACRN_IOREQ_TYPE_MMIO
REQ_PCICFG			->	ACRN_IOREQ_TYPE_PCICFG
REQ_WP				->	ACRN_IOREQ_TYPE_WP

REQUEST_READ			->	ACRN_IOREQ_DIR_READ
REQUEST_WRITE			->	ACRN_IOREQ_DIR_WRITE
REQ_STATE_PROCESSING		->	ACRN_IOREQ_STATE_PROCESSING
REQ_STATE_PENDING		->	ACRN_IOREQ_STATE_PENDING
REQ_STATE_COMPLETE		->	ACRN_IOREQ_STATE_COMPLETE
REQ_STATE_FREE			->	ACRN_IOREQ_STATE_FREE

IC_CREATE_IOREQ_CLIENT		->	ACRN_IOCTL_CREATE_IOREQ_CLIENT
IC_DESTROY_IOREQ_CLIENT		->	ACRN_IOCTL_DESTROY_IOREQ_CLIENT
IC_ATTACH_IOREQ_CLIENT		->	ACRN_IOCTL_ATTACH_IOREQ_CLIENT
IC_NOTIFY_REQUEST_FINISH	->	ACRN_IOCTL_NOTIFY_REQUEST_FINISH
IC_CLEAR_VM_IOREQ		->	ACRN_IOCTL_CLEAR_VM_IOREQ
HYPERVISOR_CALLBACK_VHM_VECTOR	->	HYPERVISOR_CALLBACK_HSM_VECTOR

arch_fire_vhm_interrupt()	->	arch_fire_hsm_interrupt()
get_vhm_notification_vector()	->	get_hsm_notification_vector()
set_vhm_notification_vector()	->	set_hsm_notification_vector()
acrn_vhm_notification_vector	->	acrn_hsm_notification_vector
get_vhm_req_state()		->	get_io_req_state()
set_vhm_req_state()		->	set_io_req_state()

Below structures have slight difference with former ones.

  struct acrn_ioreq_notify
  strcut acrn_io_request

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2021-07-15 11:53:54 +08:00

137 lines
3.9 KiB
C

/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef ARCH_X86_IRQ_H
#define ARCH_X86_IRQ_H
#include <types.h>
/**
* @file arch/x86/asm/irq.h
*
* @brief public APIs for x86 IRQ handling
*/
#define DBG_LEVEL_PTIRQ 6U
#define DBG_LEVEL_IRQ 6U
#define NR_MAX_VECTOR 0xFFU
#define VECTOR_INVALID (NR_MAX_VECTOR + 1U)
/* # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI */
#define NR_STATIC_MAPPINGS_1 3U
/*
* The static IRQ/Vector mapping table in irq.c consists of the following entries:
* # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI
*
* # of CONFIG_MAX_VM_NUM entries for posted interrupt notification, platform
* specific but known at build time:
* Allocate unique Activation Notification Vectors (ANV) for each vCPU that belongs
* to the same pCPU, the ANVs need only be unique within each pCPU, not across all
* vCPUs. The max numbers of vCPUs may be running on top of a pCPU is CONFIG_MAX_VM_NUM,
* since ACRN does not support 2 vCPUs of same VM running on top of same pCPU.
* This reduces # of pre-allocated ANVs for posted interrupts to CONFIG_MAX_VM_NUM,
* and enables ACRN to avoid switching between active and wake-up vector values
* in the posted interrupt descriptor on vCPU scheduling state changes.
*/
#define NR_STATIC_MAPPINGS (NR_STATIC_MAPPINGS_1 + CONFIG_MAX_VM_NUM)
#define HYPERVISOR_CALLBACK_HSM_VECTOR 0xF3U
/* vectors range for dynamic allocation, usually for devices */
#define VECTOR_DYNAMIC_START 0x20U
#define VECTOR_DYNAMIC_END 0xDFU
/* vectors range for fixed vectors, usually for HV service */
#define VECTOR_FIXED_START 0xE0U
#define VECTOR_FIXED_END 0xFFU
#define TIMER_VECTOR (VECTOR_FIXED_START)
#define NOTIFY_VCPU_VECTOR (VECTOR_FIXED_START + 1U)
#define PMI_VECTOR (VECTOR_FIXED_START + 2U)
/*
* Starting vector for posted interrupts
* # of CONFIG_MAX_VM_NUM (POSTED_INTR_VECTOR ~ (POSTED_INTR_VECTOR + CONFIG_MAX_VM_NUM - 1U))
* consecutive vectors reserved for posted interrupts
*/
#define POSTED_INTR_VECTOR (VECTOR_FIXED_START + NR_STATIC_MAPPINGS_1)
#define TIMER_IRQ (NR_IRQS - 1U)
#define NOTIFY_VCPU_IRQ (NR_IRQS - 2U)
#define PMI_IRQ (NR_IRQS - 3U)
/*
* Starting IRQ for posted interrupts
* # of CONFIG_MAX_VM_NUM (POSTED_INTR_IRQ ~ (POSTED_INTR_IRQ + CONFIG_MAX_VM_NUM - 1U))
* consecutive IRQs reserved for posted interrupts
*/
#define POSTED_INTR_IRQ (NR_IRQS - NR_STATIC_MAPPINGS_1 - CONFIG_MAX_VM_NUM)
/* the maximum number of msi entry is 2048 according to PCI
* local bus specification
*/
#define MAX_MSI_ENTRY 0x800U
#define INVALID_INTERRUPT_PIN 0xffffffffU
/*
* x86 irq data
*/
struct x86_irq_data {
uint32_t vector; /**< assigned vector */
#ifdef PROFILING_ON
uint64_t ctx_rip;
uint64_t ctx_rflags;
uint64_t ctx_cs;
#endif
};
struct intr_excp_ctx;
/**
* @brief Allocate a vectror and bind it to irq
*
* For legacy irq (num < 16) and statically mapped ones, do nothing
* if mapping is correct.
*
* @param[in] irq The irq num to bind
*
* @return valid vector num on susccess, VECTOR_INVALID on failure
*/
uint32_t alloc_irq_vector(uint32_t irq);
/**
* @brief Get vector number of an interrupt from irq number
*
* @param[in] irq The irq_num to convert
*
* @return vector number
*/
uint32_t irq_to_vector(uint32_t irq);
/**
* @brief Dispatch interrupt
*
* To dispatch an interrupt, an action callback will be called if registered.
*
* @param ctx Pointer to interrupt exception context
*/
void dispatch_interrupt(const struct intr_excp_ctx *ctx);
/* Arch specific routines called from generic IRQ handling */
struct irq_desc;
void init_irq_descs_arch(struct irq_desc *descs);
void setup_irqs_arch(void);
void init_interrupt_arch(uint16_t pcpu_id);
void free_irq_arch(uint32_t irq);
bool request_irq_arch(uint32_t irq);
void pre_irq_arch(const struct irq_desc *desc);
void post_irq_arch(const struct irq_desc *desc);
#endif /* ARCH_X86_IRQ_H */