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Project ACRN hypervisor
0397cb7174
Currently, not all platforms support posted interrupt processing of both VT-x and VT-d. On EHL, VT-d doesn't support posted interrupt processing. So in such scenario, is_pi_capable() in vcpu_handle_pi_notification() will bypass the PIR pending bits check which might cause a self-NV-IPI lost. With commit "bf1ff8c98 (hv: Offload syncing PIR to vIRR to processor hardware)", the syncing PIR to vIRR is postponed and it is handled by a self-NV-IPI in the following VMEnter. The process looks like, a) vcpu A accepts a virtual interrupt -> 1) ACRN_REQUEST_EVENT is set 2) corresponding bit in PIR is set 3) Posted Interrupt ON bit is set b) vcpu A does virtual interrupt injection on resume path due to the pending ACRN_REQUEST_EVENT -> 1) hypervisor disables host interrupt 2) ACRN_REQUEST_EVENT is cleared 3) a self-NV-IPI is sent via ICR of LAPIC. 4) IRR bit of the self-NV-IPI is set c) (VM-ENTRY) vcpu A returns into non-root mode 1) host interrupt enable(by HW) 2) posted interrupt processing clears the ON bit, sync PIR to vIRR 3) deliver the virtual interrupt if guest rflags.IF=1 d) (VM-EXIT) vcpu A traps due to a instruction execution (e.g. HLT) 1) host interrupt disable(by HW) 2) hypervisor enable host interrupt Above illustrates a normal process of the virtual interrupt injection with cpu PI support. However, a failing case is observed. The failing case is that the self-NV-IPI from b-3 is not accepted by the core until a timing between d-1 and d-2. b-4 happening between d-1 and d-2 is observed by debug trace. So the self-NV-IPI will be handled in root-mode which cannot do the syncing PIR to vIRR processing. Due to the bug described in the first paragraph, vcpu_handle_pi_notification() cannot succeed the virtual interrupt injection request. This patch fix it by removing the wrong check in vcpu_handle_pi_notification() because vcpu_handle_pi_notification() only happens on platform with cpu PI support. Here are some cost data for sending IPI via LAPIC ICR regsiter. Normally, the cycles between ICR write and IRR got set is 140~260, which is not accurate due to the MSR read overhead. And from b-3 to c is about 560 cycles. So b-4 happens during this period. But in bad case, b-4 doesn't happen even c is triggered. The worse case i captured is that ICR write and IRR got set costs more than 1900 cycles. Now, the best GUESS of the huge cost of IPI via ICR is the ACPI bus arbitration(refer to SDM 10.6.3, 10.7 and Figure 10-17). Tracked-On: #4937 Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com> Acked-by： Eddie Dong <eddie.dong@intel.com> |
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| devicemodel | ||
| doc | ||
| hypervisor | ||
| misc | ||
| .checkpatch.conf | ||
| .gitignore | ||
| CODEOWNERS | ||
| LICENSE | ||
| Makefile | ||
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| README.rst | ||
| VERSION | ||
Project ACRN Embedded Hypervisor ################################ The open source project ACRN defines a device hypervisor reference stack and an architecture for running multiple software subsystems, managed securely, on a consolidated system by means of a virtual machine manager. It also defines a reference framework implementation for virtual device emulation, called the "ACRN Device Model". The ACRN Hypervisor is a Type 1 reference hypervisor stack, running directly on the bare-metal hardware, and is suitable for a variety of IoT and embedded device solutions. The ACRN hypervisor addresses the gap that currently exists between datacenter hypervisors, and hard partitioning hypervisors. The ACRN hypervisor architecture partitions the system into different functional domains, with carefully selected guest OS sharing optimizations for IoT and embedded devices. .. start_include_here Community Support ***************** The Project ACRN Developer Community includes developers from member organizations and the general community all joining in the development of software within the project. Members contribute and discuss ideas, submit bugs and bug fixes. They also help those in need through the community's forums such as mailing lists and IRC channels. Anyone can join the developer community and the community is always willing to help its members and the User Community to get the most out of Project ACRN. Welcome to the project ARCN community! We're now holding weekly Technical Community Meetings and encourage you to call in and learn more about the project. Meeting information is on the `TCM Meeting page`_ in our `ACRN wiki <https://wiki.projectacrn.org/>`_. .. _TCM Meeting page: https://github.com/projectacrn/acrn-hypervisor/wiki/ACRN-Committee-and-Working-Group-Meetings#technical-community-meetings Resources ********* Here's a quick summary of resources to find your way around the Project ACRN support systems: * **Project ACRN Website**: The https://projectacrn.org website is the central source of information about the project. On this site, you'll find background and current information about the project as well as relevant links to project material. For a quick start, refer to the `Introduction`_ and `Getting Started Guide`_. * **Source Code in GitHub**: Project ACRN source code is maintained on a public GitHub repository at https://github.com/projectacrn/acrn-hypervisor. You'll find information about getting access to the repository and how to contribute to the project in this `Contribution Guide`_ document. * **Documentation**: Project technical documentation is developed along with the project's code, and can be found at https://projectacrn.github.io. Additional documentation is maintained in the `Project ACRN GitHub wiki`_. * **Issue Reporting and Tracking**: Requirements and Issue tracking is done in the Github issues system: https://github.com/projectacrn/acrn-hypervisor/issues. You can browse through the reported issues and submit issues of your own. * **Reporting a Potential Security Vulnerability**: If you have discovered potential security vulnerability in ACRN, please send an e-mail to secure@intel.com. For issues related to Intel Products, please visit https://security-center.intel.com. It is important to include the following details: - The projects and versions affected - Detailed description of the vulnerability - Information on known exploits Vulnerability information is extremely sensitive. Please encrypt all security vulnerability reports using our `PGP key`_. A member of the Intel Product Security Team will review your e-mail and contact you to to collaborate on resolving the issue. For more information on how Intel works to resolve security issues, see: `vulnerability handling guidelines`_. * **Mailing List**: The `Project ACRN Development mailing list`_ is perhaps the most convenient way to track developer discussions and to ask your own support questions to the project ACRN community. There are also specific `ACRN mailing list subgroups`_ for builds, users, and Technical Steering Committee notes, for example. You can read through the message archives to follow past posts and discussions, a good thing to do to discover more about the project. .. _Introduction: https://projectacrn.github.io/latest/introduction/ .. _Getting Started Guide: https://projectacrn.github.io/latest/getting-started/ .. _Contribution Guide: https://projectacrn.github.io/latest/contribute.html .. _Project ACRN GitHub wiki: https://github.com/projectacrn/acrn-hypervisor/wiki .. _PGP Key: https://www.intel.com/content/www/us/en/security-center/pgp-public-key.html .. _vulnerability handling guidelines: https://www.intel.com/content/www/us/en/security-center/vulnerability-handling-guidelines.html .. _Project ACRN Development mailing list: https://lists.projectacrn.org/g/acrn-dev .. _ACRN mailing list subgroups: https://lists.projectacrn.org/g/main/subgroups