Xiaoguang Wu 7a3ea2ad89 DM USB: xHCI: fix corner case of short packet logic ...

The old logic identify the short packet complete status (CS) by
comparing the transfered bytes (TB) and the expected transfered
bytes (ETB), it is right only when no error happend. If error
appears, the TB may be less than the ETB, but DM should report
error CS instead of short packet CS.

Tracked-On: #3401
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>

2019-07-12 17:04:44 +08:00

..

pci

DM USB: xHCI: fix corner case of short packet logic

2019-07-12 17:04:44 +08:00

platform

DM USB: xHCI: change log for convenience of debugging

2019-07-12 17:04:44 +08:00

block_if.c

dm: fix some possible memory leak

2019-07-12 09:41:15 +08:00

uart_core.c

dm: refine assert usage

2019-06-24 11:57:05 +08:00

usb_core.c

dm: cleanup assert in core.c

2019-07-05 09:36:02 +08:00