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Current, SNP control bit is only set in ept_mr_add for cacheable memory. However, memory type for VM0 is added as uncacheable type. So SNP control is not set for VM0. Add code to set SNP control bit for cacheable memory when ept modification. Tracked-On: #1762 Signed-off-by: Binbin Wu <binbin.wu@intel.com> Reviewed-by: Li, Fei1 <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
5.6 KiB
5.6 KiB