Li, Fei1 0e046c7a0a hv: vlapic: clear which access type we support for APIC-Access VM Exit ... The current implement doesn't clear which access type we support for APIC-Access VM Exit: 1) linear access for an instruction fetch -- APIC-access page is mapped as UC which doesn't support fetch 2) linear access (read or write) during event delivery -- Which is not happened in normal case except the guest went wrong, such as, set the IDT table in APIC-access page. In this case, we don't need to support. 3) guest-physical access during event delivery; guest-physical access for an instruction fetch or during instruction execution -- Do we plan to support enable APIC in real mode ? I don't think so. Tracked-On: #1842 Signed-off-by: Li, Fei1 <fei1.li@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>		2019-06-20 08:53:25 +08:00
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arch/x86	hv: vlapic: clear which access type we support for APIC-Access VM Exit	2019-06-20 08:53:25 +08:00
common	hv: Remove unused variable in ptirq_msi_info	2019-05-31 12:31:52 +08:00
debug	xHV: remove unused function is_dbg_uart_enabled	2019-05-22 16:36:03 +08:00
dm	hv: Rename tables member of vPCI msix struct pci_msix	2019-06-17 11:06:56 +08:00
hw	ACRN/HV: emulated pcicfg uses the aligned offset to fix the unaligned pci_cfg access	2019-06-13 10:28:17 +08:00
lib	hv:move several files related X86 for lib	2019-05-13 10:12:20 +08:00
public	DM/HV: Increase VM name len	2019-05-27 12:13:51 +08:00