mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-05-02 13:44:00 +00:00
13d354e7a6
Change the return type of function fls and clz as uint16_t;
When the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls or clz;
When input value is zero, clz returns 32 directly.
V1-->V2:
INVALID_BIT_INDEX instead of INVALID_NUMBER;
Add type conversion as needed;
Add "U/UL" for constant value as needed;
Codeing style fixing.
V2-->V3:
Use type conversion to remove side effect of
the variable which stores fls/clz return value;
fls return INVALID_BIT_INDEX directly when the
input value is zero.
V3-->v4:
Clean up comments for fls.
Note: For instruction "bsrl", destination register value
is undefined when source register value is zero.
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
253 lines
6.7 KiB
C
253 lines
6.7 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* Copyright (c) 2017 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef BITS_H
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#define BITS_H
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#define BUS_LOCK "lock ; "
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/**
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*
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* INVALID_BIT_INDEX means when input paramter is zero,
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* bit operations function can't find bit set and return
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* the invalid bit index directly.
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*
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**/
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#define INVALID_BIT_INDEX 0xffffU
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/**
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*
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* fls - Find the Last (most significant) bit Set in value and
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* return the bit index of that bit.
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*
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* Bits are numbered starting at 0,the least significant bit.
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* A return value of INVALID_BIT_INDEX means return value is
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* invalid bit index when the input argument was zero.
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*
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* Examples:
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* fls (0x0) = INVALID_BIT_INDEX
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* fls (0x01) = 0
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* fls (0x80) = 7
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* ...
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* fls (0x80000001) = 31
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*
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* @param value: 'uint32_t' type value
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*
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* @return value: zero-based bit index, INVALID_BIT_INDEX means
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* when 'value' was zero, bit operations function can't find bit
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* set and return the invalid bit index directly.
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*
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* **/
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static inline uint16_t fls(uint32_t value)
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{
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uint32_t ret = 0U;
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if (value == 0U)
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return (INVALID_BIT_INDEX);
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asm volatile("bsrl %1,%0"
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: "=r" (ret)
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: "rm" (value));
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return (uint16_t)ret;
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}
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static inline int fls64(unsigned long value)
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{
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int ret;
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asm volatile("bsrq %1,%q0"
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: "=r" (ret)
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: "rm" (value), "0" (-1));
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return ret;
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}
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/**
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*
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* ffs64 - Find the First (least significant) bit Set in value(Long type)
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* and return the index of that bit.
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*
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* Bits are numbered starting at 0,the least significant bit.
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* A return value of -1 means that the argument was zero.
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*
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* Examples:
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* ffs64 (0x0) = -1
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* ffs64 (0x01) = 0
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* ffs64 (0xf0) = 4
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* ffs64 (0xf00) = 8
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* ...
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* ffs64 (0x8000000000000001) = 0
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* ffs64 (0xf000000000000000) = 60
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*
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* @param value: 'unsigned long' type value
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*
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* @return value: zero-based bit index, -1 means 'value' was zero.
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*
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* **/
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static inline int ffs64(unsigned long value)
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{
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int ret;
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asm volatile("bsfq %1,%q0"
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: "=r" (ret)
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: "rm" (value), "0" (-1));
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return ret;
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}
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/*bit scan forward for the least significant bit '0'*/
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static inline int ffz64(unsigned long value)
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{
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return ffs64(~value);
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}
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/**
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* Counts leading zeros.
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*
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* The number of leading zeros is defined as the number of
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* most significant bits which are not '1'. E.g.:
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* clz(0x80000000)==0
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* clz(0x40000000)==1
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* ...
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* clz(0x00000001)==31
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* clz(0x00000000)==32
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*
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* @param value:The 32 bit value to count the number of leading zeros.
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*
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* @return The number of leading zeros in 'value'.
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*/
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static inline uint16_t clz(uint32_t value)
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{
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if (value == 0U)
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return 32U;
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else{
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return (31U - fls(value));
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}
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}
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/**
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* Counts leading zeros (64 bit version).
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*
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* @param value:The 64 bit value to count the number of leading zeros.
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*
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* @return The number of leading zeros in 'value'.
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*/
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static inline int clz64(unsigned long value)
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{
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return (63 - fls64(value));
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}
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/*
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* (*addr) |= (1UL<<nr);
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* Note:Input parameter nr shall be less than 64.
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* If nr>=64, it will be truncated.
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*/
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#define build_bitmap_set(name, lock, nr, addr) \
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static inline void name(uint16_t nr, volatile uint64_t *addr) \
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{ \
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nr = nr & 0x3fU; \
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asm volatile(lock "orq %q1,%0" \
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: "+m" (*addr) \
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: "r" ((1UL<<(uint64_t)nr)) \
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: "cc", "memory"); \
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}
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build_bitmap_set(__bitmap_set, "", nr, addr)
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build_bitmap_set(bitmap_set, BUS_LOCK, nr, addr)
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/*
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* (*addr) &= ~(1UL<<nr);
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* Note:Input parameter nr shall be less than 64.
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* If nr>=64, it will be truncated.
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*/
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#define build_bitmap_clear(name, lock, nr, addr) \
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static inline void name(uint16_t nr, volatile uint64_t *addr) \
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{ \
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nr = nr & 0x3fU; \
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asm volatile(lock "andq %q1,%0" \
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: "+m" (*addr) \
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: "r" ((~(1UL<<(uint64_t)nr))) \
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: "cc", "memory"); \
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}
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build_bitmap_clear(__bitmap_clear, "", nr, addr)
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build_bitmap_clear(bitmap_clear, BUS_LOCK, nr, addr)
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/*
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* return !!((*addr) & (1UL<<nr));
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* Note:Input parameter nr shall be less than 64. If nr>=64, it will
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* be truncated.
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*/
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static inline bool bitmap_test(uint16_t nr, volatile uint64_t *addr)
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{
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int32_t ret=0;
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nr = nr & 0x3fU;
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asm volatile("btq %q2,%1\n\tsbbl %0, %0"
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: "=r" (ret), "=m" (*addr)
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: "r" ((uint64_t)nr)
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: "cc", "memory");
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return (ret != 0);
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}
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/*
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* bool ret = (*addr) & (1UL<<nr);
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* (*addr) |= (1UL<<nr);
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* return ret;
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* Note:Input parameter nr shall be less than 64. If nr>=64, it
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* will be truncated.
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*/
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#define build_bitmap_testandset(name, lock, nr, addr) \
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static inline bool name(uint16_t nr, volatile uint64_t *addr) \
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{ \
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int32_t ret=0; \
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nr = nr & 0x3fU; \
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asm volatile(lock "btsq %q2,%1\n\tsbbl %0,%0" \
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: "=r" (ret), "=m" (*addr) \
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: "r" ((uint64_t)nr) \
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: "cc", "memory"); \
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return (ret != 0); \
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}
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build_bitmap_testandset(__bitmap_test_and_set, "", nr, addr)
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build_bitmap_testandset(bitmap_test_and_set, BUS_LOCK, nr, addr)
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/*
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* bool ret = (*addr) & (1UL<<nr);
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* (*addr) &= ~(1UL<<nr);
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* return ret;
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* Note:Input parameter nr shall be less than 64. If nr>=64,
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* it will be truncated.
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*/
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#define build_bitmap_testandclear(name, lock, nr, addr) \
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static inline bool name(uint16_t nr, volatile uint64_t *addr) \
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{ \
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int32_t ret=0; \
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nr = nr & 0x3fU; \
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asm volatile(lock "btrq %q2,%1\n\tsbbl %0,%0" \
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: "=r" (ret), "=m" (*addr) \
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: "r" ((uint64_t)nr) \
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: "cc", "memory"); \
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return (ret != 0); \
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}
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build_bitmap_testandclear(__bitmap_test_and_clear, "", nr, addr)
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build_bitmap_testandclear(bitmap_test_and_clear, BUS_LOCK, nr, addr)
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#endif /* BITS_H*/
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