Chenli Wei 174917726d misc: refine the calculate logic of hv_ram_size ...

The legacy logic use double IVSHMEM_SIZE to calculate the HV RAM, it can't
match the current code.

This patch use the IVSHMEM_SIZE size only.

Tracked-On: #6690
Signed-off-by: Chenli Wei <chenli.wei@intel.com>

2022-11-14 10:41:49 +08:00

..

lib

Update copyright year range in code headers

2022-07-15 11:48:35 +08:00

bdf.py

static_allocator: skip ACPI objects referring all functions of a PCI device

2022-11-07 16:22:27 +08:00

board_capability.py

config_tool: add MAX_PCI_BUS_NUM in UI

2022-08-19 12:28:45 +08:00

clos.py

misc: refine the vCPU sort for cpu_affinity and CAT

2022-08-30 16:36:53 +08:00

cpu_affinity.py

misc: refine the vCPU sort for cpu_affinity and CAT

2022-08-30 16:36:53 +08:00

cpu_freq.py

config-tools: generate CPU frequency limits

2022-10-08 11:13:21 +08:00

gpa.py

config-tools: reserve the secondary PCI bus mmio windows

2022-09-30 11:51:47 +08:00

guest_flags.py

config tool:add debug mode limitation for PMU

2022-11-02 15:50:30 +08:00

hv_ram.py

misc: refine the calculate logic of hv_ram_size

2022-11-14 10:41:49 +08:00

intx.py

Update copyright year range in code headers

2022-07-15 11:48:35 +08:00

main.py

Update copyright year range in code headers

2022-07-15 11:48:35 +08:00

memory_allocator.py

config-tools: Fix error reporting for memory addresses below 4G

2022-09-08 20:59:47 +08:00

pio.py

Update copyright year range in code headers

2022-07-15 11:48:35 +08:00

s5_vuart.py

misc: modify the vUART index order and irq

2022-06-29 13:53:42 +08:00