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Use tp register to hold the current logical CPU ID. This follows the same design as x86 which uses MSR_IA32_SYSENTER_CS for the same purpose. riscv uses SBI HSM to start the APs. Tracked-On: #8791 Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>