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https://github.com/projectacrn/acrn-hypervisor.git
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8b16be9185
Many of the license and Intel copyright headers include the "All rights reserved" string. It is not relevant in the context of the BSD-3-Clause license that the code is released under. This patch removes those strings throughout the code (hypervisor, devicemodel and misc). Tracked-On: #7254 Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
154 lines
4.3 KiB
C
154 lines
4.3 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* Copyright (c) 2018 Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef ATOMIC_H
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#define ATOMIC_H
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#include <types.h>
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#define BUS_LOCK "lock ; "
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#define build_atomic_inc(name, size, type) \
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static inline void name(type *ptr) \
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{ \
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asm volatile(BUS_LOCK "inc" size " %0" \
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: "=m" (*ptr) \
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: "m" (*ptr)); \
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}
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build_atomic_inc(atomic_inc16, "w", uint16_t)
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build_atomic_inc(atomic_inc32, "l", uint32_t)
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build_atomic_inc(atomic_inc64, "q", uint64_t)
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#define build_atomic_dec(name, size, type) \
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static inline void name(type *ptr) \
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{ \
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asm volatile(BUS_LOCK "dec" size " %0" \
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: "=m" (*ptr) \
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: "m" (*ptr)); \
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}
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build_atomic_dec(atomic_dec16, "w", uint16_t)
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build_atomic_dec(atomic_dec32, "l", uint32_t)
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build_atomic_dec(atomic_dec64, "q", uint64_t)
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#define build_atomic_swap(name, size, type) \
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static inline type name(type *ptr, type v) \
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{ \
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asm volatile(BUS_LOCK "xchg" size " %1,%0" \
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: "+m" (*ptr), "+r" (v) \
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: \
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: "cc", "memory"); \
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return v; \
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}
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build_atomic_swap(atomic_swap32, "l", uint32_t)
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build_atomic_swap(atomic_swap64, "q", uint64_t)
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/*
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* #define atomic_readandclear32(P) \
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* (return (*(uint32_t *)(P)); *(uint32_t *)(P) = 0U;)
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*/
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static inline uint32_t atomic_readandclear32(uint32_t *p)
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{
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return atomic_swap32(p, 0U);
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}
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/*
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* #define atomic_readandclear64(P) \
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* (return (*(uint64_t *)(P)); *(uint64_t *)(P) = 0UL;)
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*/
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static inline uint64_t atomic_readandclear64(uint64_t *p)
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{
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return atomic_swap64(p, 0UL);
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}
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#define build_atomic_cmpxchg(name, size, type) \
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static inline type name(volatile type *ptr, type old, type new) \
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{ \
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type ret; \
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asm volatile(BUS_LOCK "cmpxchg" size " %2,%1" \
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: "=a" (ret), "+m" (*ptr) \
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: "r" (new), "0" (old) \
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: "memory"); \
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return ret; \
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}
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build_atomic_cmpxchg(atomic_cmpxchg32, "l", uint32_t)
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build_atomic_cmpxchg(atomic_cmpxchg64, "q", uint64_t)
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#define build_atomic_xadd(name, size, type) \
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static inline type name(type *ptr, type v) \
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{ \
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asm volatile(BUS_LOCK "xadd" size " %0,%1" \
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: "+r" (v), "+m" (*ptr) \
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: \
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: "cc", "memory"); \
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return v; \
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}
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build_atomic_xadd(atomic_xadd16, "w", uint16_t)
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build_atomic_xadd(atomic_xadd32, "l", int32_t)
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build_atomic_xadd(atomic_xadd64, "q", int64_t)
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static inline int32_t atomic_add_return(int32_t *p, int32_t v)
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{
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return (atomic_xadd32(p, v) + v);
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}
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static inline int32_t atomic_sub_return(int32_t *p, int32_t v)
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{
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return (atomic_xadd32(p, -v) - v);
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}
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static inline int32_t atomic_inc_return(int32_t *v)
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{
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return atomic_add_return(v, 1);
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}
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static inline int32_t atomic_dec_return(int32_t *v)
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{
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return atomic_sub_return(v, 1);
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}
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static inline int64_t atomic_add64_return(int64_t *p, int64_t v)
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{
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return (atomic_xadd64(p, v) + v);
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}
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static inline int64_t atomic_sub64_return(int64_t *p, int64_t v)
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{
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return (atomic_xadd64(p, -v) - v);
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}
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static inline int64_t atomic_inc64_return(int64_t *v)
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{
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return atomic_add64_return(v, 1);
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}
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static inline int64_t atomic_dec64_return(int64_t *v)
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{
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return atomic_sub64_return(v, 1);
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}
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#endif /* ATOMIC_H*/
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