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https://github.com/projectacrn/acrn-hypervisor.git
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cf91e66ac0
This commit cleans up struct acrn_vcpu. vcpu API cleanup will be in future patch series. Create a common vcpu.h hosting struct acrn_vcpu, and move some x86 specific members of struct acrn_vcpu into struct acrn_vcpu_arch. These members includes: reg_cached reg_updated inst_ctxt And pending_req is being moved from arch to common. And the maximum number of events (i.e., VCPU_EVENT_NUM) are being replaced by MAX_VCPU_EVENT_NUM. To avoid circular dependency, some in-header helpers are moved into vcpu.c with only prototypes being declared inside header. Tracked-On: #8830 Signed-off-by: Yifan Liu <yifan1.liu@intel.com> Reviewed-by: Fei Li <fei1.li@intel.com> Acked-by: Wang Yu1 <yu1.wang@intel.com>
70 lines
1.7 KiB
C
70 lines
1.7 KiB
C
/*
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* Copyright (C) 2018-2022 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VMCS_H_
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#define VMCS_H_
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#define VM_SUCCESS 0
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#define VM_FAIL (-1)
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#ifndef ASSEMBLER
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#include <types.h>
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#include <vcpu.h>
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#define VMX_VMENTRY_FAIL 0x80000000U
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#define APIC_ACCESS_OFFSET 0xFFFUL /* 11:0, offset within the APIC page */
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#define APIC_ACCESS_TYPE 0xF000UL /* 15:12, access type */
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#define TYPE_LINEAR_APIC_INST_READ (0UL << 12U)
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#define TYPE_LINEAR_APIC_INST_WRITE (1UL << 12U)
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/* VM exit qulifications for APIC-access
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* Access type:
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* 0 = linear access for a data read during instruction execution
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* 1 = linear access for a data write during instruction execution
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* 2 = linear access for an instruction fetch
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* 3 = linear access (read or write) during event delivery
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* 10 = guest-physical access during event delivery
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* 15 = guest-physical access for an instructon fetch or during
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* instruction execution
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*/
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static inline uint64_t apic_access_type(uint64_t qual)
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{
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return (qual & APIC_ACCESS_TYPE);
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}
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static inline uint64_t apic_access_offset(uint64_t qual)
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{
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return (qual & APIC_ACCESS_OFFSET);
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}
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static inline void clear_vmcs_bit(uint32_t vmcs_field, uint64_t bit)
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{
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uint64_t val64;
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val64 = exec_vmread(vmcs_field);
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val64 &= ~bit;
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exec_vmwrite(vmcs_field, val64);
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}
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static inline void set_vmcs_bit(uint32_t vmcs_field, uint64_t bit)
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{
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uint64_t val64;
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val64 = exec_vmread(vmcs_field);
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val64 |= bit;
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exec_vmwrite(vmcs_field, val64);
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}
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void init_vmcs(struct acrn_vcpu *vcpu);
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void load_vmcs(const struct acrn_vcpu *vcpu);
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void init_host_state(void);
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void switch_apicv_mode_x2apic(struct acrn_vcpu *vcpu);
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#endif /* ASSEMBLER */
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#endif /* VMCS_H_ */
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