Li Fei1 1e50ec8899 hv: pci: use ECAM to access PCIe Configuration Space ... Use Enhanced Configuration Access Mechanism (MMIO) instead of PCI-compatible Configuration Mechanism (IO port) to access PCIe Configuration Space PCI-compatible Configuration Mechanism (IO port) access is used for UART in debug version. Tracked-On: #3475 Signed-off-by: Li Fei1 <fei1.li@intel.com>		2020-01-07 16:05:30 +08:00
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arch/x86	hv: pci: add hide pci devices configuration for apl-up2	2020-01-07 16:05:30 +08:00
common	hv: sched: simple event implemention	2020-01-07 11:23:32 +08:00
debug	hv: pci: use ECAM to access PCIe Configuration Space	2020-01-07 16:05:30 +08:00
dm	hv: vpci: an assign PT device should support FLR or PM reset	2019-12-30 13:43:07 +08:00
hw	hv: pci: use ECAM to access PCIe Configuration Space	2020-01-07 16:05:30 +08:00
lib	hv: support xsave in context switch	2019-12-02 09:31:12 +08:00
public	reset: detect highest severity guest dynamically	2019-12-23 15:15:09 +08:00