Qi Yadong 1fd07ba349 trusty: Simulate Secure Monitor Call(SMC) by Hypercall ... For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>		2018-05-15 17:19:38 +08:00
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arch/x86	trusty: Simulate Secure Monitor Call(SMC) by Hypercall	2018-05-15 17:19:38 +08:00
common	trusty: Simulate Secure Monitor Call(SMC) by Hypercall	2018-05-15 17:19:38 +08:00
debug	Remove STATIC_ASSERT Macro and replace with standard _Static_assert	2018-05-15 17:19:38 +08:00
lib	Move s[n]printf to lib for release	2018-05-15 17:19:37 +08:00
public	trusty: Simulate Secure Monitor Call(SMC) by Hypercall	2018-05-15 17:19:38 +08:00
hv_debug.h	initial import	2018-05-11 14:44:28 +08:00
hv_lib.h	Move s[n]printf to lib for release	2018-05-15 17:19:37 +08:00
hypervisor.h	initial import	2018-05-11 14:44:28 +08:00