mirror of
https://github.com/projectacrn/acrn-hypervisor.git
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21cb120bcc
Concurrent access on PCI device may happened if UOS try to access PCI configuration space on different vCPUs through IO port. This patch just adds a global PCI lock for each VM to prevent the concurrent access. Tracked-On: #3475 Signed-off-by: Li, Fei1 <fei1.li@intel.com>
94 lines
2.5 KiB
C
94 lines
2.5 KiB
C
/*
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* Copyright (c) 2011 NetApp, Inc.
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* Copyright (c) 2018 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <vm.h>
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#include "vpci_priv.h"
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/**
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* @pre vdev != NULL
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*/
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uint32_t pci_vdev_read_cfg(const struct pci_vdev *vdev, uint32_t offset, uint32_t bytes)
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{
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uint32_t val;
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switch (bytes) {
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case 1U:
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val = pci_vdev_read_cfg_u8(vdev, offset);
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break;
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case 2U:
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val = pci_vdev_read_cfg_u16(vdev, offset);
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break;
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default:
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val = pci_vdev_read_cfg_u32(vdev, offset);
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break;
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}
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return val;
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}
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/**
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* @pre vdev != NULL
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*/
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void pci_vdev_write_cfg(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val)
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{
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switch (bytes) {
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case 1U:
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pci_vdev_write_cfg_u8(vdev, offset, (uint8_t)val);
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break;
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case 2U:
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pci_vdev_write_cfg_u16(vdev, offset, (uint16_t)val);
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break;
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default:
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pci_vdev_write_cfg_u32(vdev, offset, val);
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break;
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}
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}
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/**
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* @pre vpci != NULL
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* @pre vpci->pci_vdev_cnt <= CONFIG_MAX_PCI_DEV_NUM
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*/
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struct pci_vdev *pci_find_vdev(struct acrn_vpci *vpci, union pci_bdf vbdf)
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{
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struct pci_vdev *vdev, *tmp;
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uint32_t i;
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vdev = NULL;
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for (i = 0U; i < vpci->pci_vdev_cnt; i++) {
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tmp = &(vpci->pci_vdevs[i]);
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if (bdf_is_equal(tmp->bdf, vbdf)) {
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vdev = tmp;
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break;
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}
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}
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return vdev;
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}
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