acrn-hypervisor/hypervisor/arch
Jian Jun Chen 22a302599a hv: tlfs: fix the incorrect vLAPIC freq MSR
When LAPIC timer is working in oneshot or periodic mode, OS uses
initial counter register/current counter register to program
a timer. Both initial counter and current counter depend on the
LAPIC frequency. ACRN emulated vLAPIC timer based on the TSC.
vLAPIC freq is the same as TSC freq.

Tracked-On: #7876
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2022-07-26 05:53:19 +08:00
..
x86 hv: tlfs: fix the incorrect vLAPIC freq MSR 2022-07-26 05:53:19 +08:00