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Before the ACRN HV entered the S3, we would call cache_flush_invalidate_all to flush all the caches into memory and invalidate the caches on each logical cpu before we halt the cpu. This was not a problem before we support pSRAM. Once pSRAM binary code has been executed on the logical cpu, we could not flush the pSRAM cache into memory then. Otherwise, the pSRAM cache can't been locked. This patch removes cache_flush_invalidate_all in cpu_dead since we would not support to put the ACRN HV into S3. Once we want to support put the ACRN HV into S3, we would try other ways to flush the data caches in this cpu into memory and valid whether that way is practical or not. Signed-off-by: Li Fei1 <fei1.li@intel.com> Tracked-On: #5806
ACRN Hypervisor ############### The open source `Project ACRN`_ defines a device hypervisor reference stack and an architecture for running multiple software subsystems, managed securely, on a consolidated system by means of a virtual machine manager. It also defines a reference framework implementation for virtual device emulation, called the "ACRN Device Model". The ACRN Hypervisor is a Type 1 reference hypervisor stack, running directly on the bare-metal hardware, and is suitable for a variety of IoT and embedded device solutions. The ACRN hypervisor addresses the gap that currently exists between datacenter hypervisors, and hard partitioning hypervisors. The ACRN hypervisor architecture partitions the system into different functional domains, with carefully selected guest OS sharing optimizations for IoT and embedded devices. You can find out more about Project ACRN on the `Project ACRN documentation`_ website. .. _`Project ACRN`: https://projectacrn.org .. _`ACRN Hypervisor`: https://github.com/projectacrn/acrn-hypervisor .. _`Project ACRN documentation`: https://projectacrn.github.io/