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649406b049
platform_acpi_info.h should be BOARD specific so move the header file to configs/$(CONFIG_BOARD)/ folder. So the target acpi info file detect process is: Compiler search for $(CONFIG_BOARD)_acpi_info.h under hypervisor/arch/x86/$(CONFIG_BOARD)/ first (the file is supposed to be generated by offline tool so it is not included in original source), if found, then the file is the target acpi info file. If not and at the same time the ENFORCE_VALIDATED_ACPI_INFO Kconfig was set, the compiler will stop and hint user to add target acpi info file by offline tool. If ENFORCE_VALIDATED_ACPI_INFO was unset, then compiler will continue to search for platform_acpi_info.h as target acpi info file under hypervisor/arch/x86/$(CONFIG_BOARD) folder (with this file we could bypass ENFORCE_VALIDATED_ACPI_INFO check and benifit for development). If this file is not exist, then hypervisor/arch/x86/configs/platform_acpi_info.h will be included as final target acpi info. The process should work for UEFI path also, with a valid platform acpi info file, S3/S5 should work on UEFI platform. Tracked-On: #2291 Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
143 lines
2.7 KiB
C
143 lines
2.7 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <hypervisor.h>
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#include <vtd.h>
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#include <platform_acpi_info.h>
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#ifndef CONFIG_DMAR_PARSE_ENABLED
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#define MAX_DRHDS 4
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#define MAX_DRHD_DEVSCOPES 4
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static struct dmar_dev_scope drhd0_dev_scope[MAX_DRHD_DEVSCOPES] = {
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{
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.bus = DRHD0_DEVSCOPE0_BUS,
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.devfun = DRHD0_DEVSCOPE0_PATH
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},
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{
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.bus = DRHD0_DEVSCOPE1_BUS,
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.devfun = DRHD0_DEVSCOPE1_PATH
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},
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{
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.bus = DRHD0_DEVSCOPE2_BUS,
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.devfun = DRHD0_DEVSCOPE2_PATH
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},
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{
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.bus = DRHD0_DEVSCOPE3_BUS,
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.devfun = DRHD0_DEVSCOPE3_PATH
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}
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};
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static struct dmar_dev_scope drhd1_dev_scope[MAX_DRHD_DEVSCOPES] = {
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{
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.type = ACPI_DMAR_SCOPE_TYPE_IOAPIC,
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.id = DRHD1_IOAPIC_ID,
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.bus = DRHD1_DEVSCOPE0_BUS,
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.devfun = DRHD1_DEVSCOPE0_PATH
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},
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{
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.bus = DRHD1_DEVSCOPE1_BUS,
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.devfun = DRHD1_DEVSCOPE1_PATH
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},
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{
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.bus = DRHD1_DEVSCOPE2_BUS,
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.devfun = DRHD1_DEVSCOPE2_PATH
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},
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{
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.bus = DRHD1_DEVSCOPE3_BUS,
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.devfun = DRHD1_DEVSCOPE3_PATH
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}
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};
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static struct dmar_dev_scope drhd2_dev_scope[MAX_DRHD_DEVSCOPES] = {
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{
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.bus = DRHD2_DEVSCOPE0_BUS,
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.devfun = DRHD2_DEVSCOPE0_PATH
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},
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{
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.bus = DRHD2_DEVSCOPE1_BUS,
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.devfun = DRHD2_DEVSCOPE1_PATH
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},
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{
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.bus = DRHD2_DEVSCOPE2_BUS,
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.devfun = DRHD2_DEVSCOPE2_PATH
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},
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{
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.bus = DRHD2_DEVSCOPE3_BUS,
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.devfun = DRHD2_DEVSCOPE3_PATH
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}
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};
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static struct dmar_dev_scope drhd3_dev_scope[MAX_DRHD_DEVSCOPES] = {
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{
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.bus = DRHD3_DEVSCOPE0_BUS,
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.devfun = DRHD3_DEVSCOPE0_PATH
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},
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{
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.bus = DRHD3_DEVSCOPE1_BUS,
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.devfun = DRHD3_DEVSCOPE1_PATH
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},
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{
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.bus = DRHD3_DEVSCOPE2_BUS,
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.devfun = DRHD3_DEVSCOPE2_PATH
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},
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{
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.bus = DRHD3_DEVSCOPE3_BUS,
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.devfun = DRHD3_DEVSCOPE3_PATH
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}
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};
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static struct dmar_drhd drhd_info_array[MAX_DRHDS] = {
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{
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.dev_cnt = DRHD0_DEV_CNT,
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.segment = DRHD0_SEGMENT,
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.flags = DRHD0_FLAGS,
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.reg_base_addr = DRHD0_REG_BASE,
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.ignore = DRHD0_IGNORE,
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.devices = drhd0_dev_scope
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},
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{
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.dev_cnt = DRHD1_DEV_CNT,
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.segment = DRHD1_SEGMENT,
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.flags = DRHD1_FLAGS,
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.reg_base_addr = DRHD1_REG_BASE,
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.ignore = DRHD1_IGNORE,
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.devices = drhd1_dev_scope
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},
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{
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.dev_cnt = DRHD2_DEV_CNT,
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.segment = DRHD2_SEGMENT,
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.flags = DRHD2_FLAGS,
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.reg_base_addr = DRHD2_REG_BASE,
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.ignore = DRHD2_IGNORE,
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.devices = drhd2_dev_scope
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},
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{
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.dev_cnt = DRHD3_DEV_CNT,
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.segment = DRHD3_SEGMENT,
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.flags = DRHD3_FLAGS,
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.reg_base_addr = DRHD3_REG_BASE,
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.ignore = DRHD3_IGNORE,
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.devices = drhd3_dev_scope
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}
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};
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static struct dmar_info sbl_dmar_info = {
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.drhd_count = DRHD_COUNT,
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.drhd_units = drhd_info_array,
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};
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/**
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* @post return != NULL
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* @post return->drhd_count > 0U
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*/
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struct dmar_info *get_dmar_info(void)
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{
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return &sbl_dmar_info;
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}
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#endif
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