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				https://github.com/projectacrn/acrn-hypervisor.git
				synced 2025-11-04 03:28:59 +00:00 
			
		
		
		
	xsave area:
    legacy region: 512 bytes
    xsave header: 64 bytes
    extended region: < 3k bytes
So, pre-allocate 4k area for xsave. Use certain instruction to save or
restore the area according to hardware xsave feature set.
Tracked-On: #4166
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
		
	
		
			
				
	
	
		
			57 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			57 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (C) 2018 Intel Corporation. All rights reserved.
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 *
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 * SPDX-License-Identifier: BSD-3-Clause
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 */
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#ifndef CPUINFO_H
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#define CPUINFO_H
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#define MAX_PSTATE	20U	/* max num of supported Px count */
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#define MAX_CSTATE	8U	/* max num of supported Cx count */
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/* We support MAX_CSTATE num of Cx, means have (MAX_CSTATE - 1) Cx entries,
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 * i.e. supported Cx entry index range from 1 to MAX_CX_ENTRY.
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 */
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#define MAX_CX_ENTRY	(MAX_CSTATE - 1U)
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/* CPUID feature words */
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#define	FEAT_1_ECX		0U     /* CPUID[1].ECX */
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#define	FEAT_1_EDX		1U     /* CPUID[1].EDX */
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#define	FEAT_7_0_EBX		2U     /* CPUID[EAX=7,ECX=0].EBX */
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#define	FEAT_7_0_ECX		3U     /* CPUID[EAX=7,ECX=0].ECX */
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#define	FEAT_7_0_EDX		4U     /* CPUID[EAX=7,ECX=0].EDX */
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#define	FEAT_8000_0001_ECX	5U     /* CPUID[8000_0001].ECX */
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#define	FEAT_8000_0001_EDX	6U     /* CPUID[8000_0001].EDX */
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#define	FEAT_8000_0007_EDX	7U     /* CPUID[8000_0007].EDX */
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#define	FEAT_8000_0008_EBX	8U     /* CPUID[8000_0008].EBX */
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#define	FEAT_D_0_EAX		9U     /* CPUID[D][0].EAX */
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#define	FEAT_D_0_EDX		10U    /* CPUID[D][0].EDX */
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#define	FEAT_D_1_EAX		11U    /* CPUID[D][1].EAX */
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#define	FEAT_D_1_ECX		13U    /* CPUID[D][1].ECX */
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#define	FEAT_D_1_EDX		14U    /* CPUID[D][1].EDX */
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#define	FEATURE_WORDS		15U
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struct cpuinfo_x86 {
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	uint8_t family, model;
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	uint8_t virt_bits;
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	uint8_t phys_bits;
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	uint32_t cpuid_level;
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	uint32_t extended_cpuid_level;
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	uint64_t physical_address_mask;
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	uint32_t cpuid_leaves[FEATURE_WORDS];
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	char model_name[64];
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};
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bool has_monitor_cap(void);
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bool monitor_cap_buggy(void);
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bool is_apicv_advanced_feature_supported(void);
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bool pcpu_has_cap(uint32_t bit);
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bool pcpu_has_vmx_ept_cap(uint32_t bit_mask);
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bool pcpu_has_vmx_vpid_cap(uint32_t bit_mask);
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void init_pcpu_capabilities(void);
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void init_pcpu_model_name(void);
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int32_t detect_hardware_support(void);
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struct cpuinfo_x86 *get_pcpu_info(void);
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#endif /* CPUINFO_H */
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