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The design of ACRN CPU performance management is to let hardware do the autonomous frequency selection(or set to a fixed value), and remove guest's ability to control CPU frequency. This patch is to implement the CPU frequency initializer, which will setup CPU frequency base on the performance policy type. Two performance policy types are provided for user to choose from: - 'Performance': CPU runs at its CPU runs at its maximum frequency. Enable hardware autonomous frequency selection if HWP is presented. - 'Nominal': CPU runs at its guaranteed frequency. The policy type is passed to hypervisor through boot parameter, as either 'cpu_perf_policy=Nominal' or 'cpu_perf_policy=Performance'. The default type is 'Performance'. Both HWP and ACPI p-state are supported. HWP is the first choice, for it provides hardware autonomous frequency selection, while keeps frequency transaction time low. Two functions are added to the hypervisor to call: - init_frequency_policy(): called by BSP at start up time. It processes the boot parameters, and enables HWP if it is presented. - apply_frequency_policy(): called after init_frequency_policy(). It applies initial CPU frequency policy setting for each core. It uses a set of frequency limits data struct to quickly decide what the highest/nominal frequency is. The frequency limits are generated by config-tools. The hypervisor will not be governing CPU frequency after initial policy is applied. Cores running RTVMs are fixed to nominal/guaranteed frequency, to get more certainty in latency. This is done by setting the core's frequency limits to highest=lowest=nominal in config-tools. Tracked-On: #8168 Signed-off-by: Wu Zhou <wu.zhou@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
42 lines
921 B
C
42 lines
921 B
C
/*
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* Copyright (C) 2019-2022 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef BOARD_H
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#define BOARD_H
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#include <types.h>
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#include <board_info.h>
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#include <asm/host_pm.h>
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#include <pci.h>
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#include <misc_cfg.h>
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#include <asm/rdt.h>
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/* forward declarations */
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struct acrn_vm;
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/* user configured mask and MSR info for each CLOS*/
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union clos_config {
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uint16_t mba_delay;
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uint32_t clos_mask;
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};
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struct vmsix_on_msi_info {
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union pci_bdf bdf;
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uint64_t mmio_base;
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};
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extern struct dmar_info plat_dmar_info;
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#ifdef CONFIG_RDT_ENABLED
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extern struct rdt_type res_cap_info[RDT_NUM_RESOURCES];
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#endif
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extern const struct cpu_state_table board_cpu_state_tbl;
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extern struct acrn_cpufreq_limits cpufreq_limits[MAX_PCPU_NUM];
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extern const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM];
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extern const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM];
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#endif /* BOARD_H */
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