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On some platforms the L3 CAT capabilities are not reported via CPUID even though they are present. The public real-time tuning guide suggests to try accessing the MSRs directly to detect if L3 CAT is available or not. This patch implements such guessing logic in the board inspector in order to enable CAT for users with those kinds of platforms. Tracked-On: #7948 Signed-off-by: Junjie Mao <junjie.mao@intel.com> |
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acpiparser | ||
cpuparser | ||
extractors | ||
inspectorlib | ||
legacy | ||
memmapparser | ||
pcieparser | ||
schema | ||
smbiosparser | ||
board_inspector.py | ||
README |
board_parser.py will collect all board related info and then generate a board info file for acrn-config host tool usage. usage: python3 board_inspector.py <board_name> [--out board_info_file] board_name : the name of board that run ACRN hypervisor, like apl-up2/nuc7i7dnb. It will be used as name of the board configurations folder which created by acrn-config host tool. board_info_file : (optional) the name of board info file. if it is not specified, a name of <board_name>.xml will be generated under the current working directory by default. Please run this script under native Linux environment with root privilege. OS requirement: Release: Ubuntu 18.04+ Tools: cpuid, rdmsr, lspci, lxml, dmidecode (optional) kernel cmdline: "iomem=relaxed intel_idle.max_cstate=0 intel_pstate=disable" or "idle=nomwait iomem=relaxed intel_idle.max_cstate=0 intel_pstate=disable" for Apollo Lake