acrn-hypervisor/hypervisor/include/arch/x86/pgtable.h
Shiqing Gao 5023937041 hv: merge pgtable_types.h and pgtable.h
- move the contents in pgtable_types.h to pgtable.h
- remove pgtable_types.h

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-13 16:17:48 +08:00

171 lines
3.9 KiB
C

/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PGTABLE_H
#define PGTABLE_H
#define PAGE_PRESENT (1UL << 0U)
#define PAGE_RW (1UL << 1U)
#define PAGE_USER (1UL << 2U)
#define PAGE_PWT (1UL << 3U)
#define PAGE_PCD (1UL << 4U)
#define PAGE_ACCESSED (1UL << 5U)
#define PAGE_DIRTY (1UL << 6U)
#define PAGE_PSE (1UL << 7U)
#define PAGE_GLOBAL (1UL << 8U)
#define PAGE_PAT_LARGE (1UL << 12U)
#define PAGE_NX (1UL << 63U)
#define PAGE_CACHE_MASK (PAGE_PCD | PAGE_PWT)
#define PAGE_CACHE_WB 0UL
#define PAGE_CACHE_WT PAGE_PWT
#define PAGE_CACHE_UC_MINUS PAGE_PCD
#define PAGE_CACHE_UC (PAGE_PCD | PAGE_PWT)
#define PAGE_TABLE (PAGE_PRESENT | PAGE_RW | PAGE_USER)
#define EPT_RD (1UL << 0U)
#define EPT_WR (1UL << 1U)
#define EPT_EXE (1UL << 2U)
#define EPT_MT_SHIFT 3U
#define EPT_UNCACHED (0UL << EPT_MT_SHIFT)
#define EPT_WC (1UL << EPT_MT_SHIFT)
#define EPT_WT (4UL << EPT_MT_SHIFT)
#define EPT_WP (5UL << EPT_MT_SHIFT)
#define EPT_WB (6UL << EPT_MT_SHIFT)
#define EPT_MT_MASK (7UL << EPT_MT_SHIFT)
/* VTD: Second-Level Paging Entries: Snoop Control */
#define EPT_SNOOP_CTRL (1UL << 11U)
#define EPT_VE (1UL << 63U)
#define EPT_RWX (EPT_RD | EPT_WR | EPT_EXE)
#define PML4E_SHIFT 39U
#define PTRS_PER_PML4E 512UL
#define PML4E_SIZE (1UL << PML4E_SHIFT)
#define PML4E_MASK (~(PML4E_SIZE - 1UL))
#define PDPTE_SHIFT 30U
#define PTRS_PER_PDPTE 512UL
#define PDPTE_SIZE (1UL << PDPTE_SHIFT)
#define PDPTE_MASK (~(PDPTE_SIZE - 1UL))
#define PDE_SHIFT 21U
#define PTRS_PER_PDE 512UL
#define PDE_SIZE (1UL << PDE_SHIFT)
#define PDE_MASK (~(PDE_SIZE - 1UL))
#define PTE_SHIFT 12U
#define PTRS_PER_PTE 512UL
#define PTE_SIZE (1UL << PTE_SHIFT)
#define PTE_MASK (~(PTE_SIZE - 1UL))
/* TODO: PAGE_MASK & PHYSICAL_MASK */
#define PML4E_PFN_MASK 0x0000FFFFFFFFF000UL
#define PDPTE_PFN_MASK 0x0000FFFFFFFFF000UL
#define PDE_PFN_MASK 0x0000FFFFFFFFF000UL
/* hpa <--> hva, now it is 1:1 mapping */
static inline void *hpa2hva(uint64_t x)
{
return (void *)x;
}
static inline uint64_t hva2hpa(void *x)
{
return (uint64_t)x;
}
static inline uint64_t pml4e_index(uint64_t address)
{
return (address >> PML4E_SHIFT) & (PTRS_PER_PML4E - 1UL);
}
static inline uint64_t pdpte_index(uint64_t address)
{
return (address >> PDPTE_SHIFT) & (PTRS_PER_PDPTE - 1UL);
}
static inline uint64_t pde_index(uint64_t address)
{
return (address >> PDE_SHIFT) & (PTRS_PER_PDE - 1UL);
}
static inline uint64_t pte_index(uint64_t address)
{
return (address >> PTE_SHIFT) & (PTRS_PER_PTE - 1UL);
}
static inline uint64_t *pml4e_page_vaddr(uint64_t pml4e)
{
return hpa2hva(pml4e & PML4E_PFN_MASK);
}
static inline uint64_t *pdpte_page_vaddr(uint64_t pdpte)
{
return hpa2hva(pdpte & PDPTE_PFN_MASK);
}
static inline uint64_t *pde_page_vaddr(uint64_t pde)
{
return hpa2hva(pde & PDE_PFN_MASK);
}
static inline uint64_t *pml4e_offset(uint64_t *pml4_page, uint64_t addr)
{
return pml4_page + pml4e_index(addr);
}
static inline uint64_t *pdpte_offset(const uint64_t *pml4e, uint64_t addr)
{
return pml4e_page_vaddr(*pml4e) + pdpte_index(addr);
}
static inline uint64_t *pde_offset(const uint64_t *pdpte, uint64_t addr)
{
return pdpte_page_vaddr(*pdpte) + pde_index(addr);
}
static inline uint64_t *pte_offset(const uint64_t *pde, uint64_t addr)
{
return pde_page_vaddr(*pde) + pte_index(addr);
}
/*
* pgentry may means pml4e/pdpte/pde/pte
*/
static inline uint64_t get_pgentry(const uint64_t *pte)
{
return *pte;
}
/*
* pgentry may means pml4e/pdpte/pde/pte
*/
static inline void set_pgentry(uint64_t *ptep, uint64_t pte)
{
*ptep = pte;
}
static inline uint64_t pde_large(uint64_t pde)
{
return pde & PAGE_PSE;
}
static inline uint64_t pdpte_large(uint64_t pdpte)
{
return pdpte & PAGE_PSE;
}
static inline uint64_t pgentry_present(enum _page_table_type ptt, uint64_t pte)
{
return (ptt == PTT_PRIMARY) ? (pte & PAGE_PRESENT) : (pte & EPT_RWX);
}
#endif /* PGTABLE_H */