Binbin Wu 2d55b49ea1 hv: ept: flush cache for modified ept entries ... EPT tables are shared by MMU and IOMMU. Some IOMMUs don't support page-walk coherency, the cpu cache of EPT entires should be flushed to memory after modifications, so that the modifications are visible to the IOMMUs. This patch adds a new interface to flush the cache of modified EPT entires. There are different implementations for EPT/PPT entries: - For PPT, there is no need to flush the cpu cache after update. - For EPT, need to call iommu_flush_cache to make the modifications visible to IOMMUs. Tracked-On: #4120 Signed-off-by: Binbin Wu <binbin.wu@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com>		2019-11-19 09:06:21 +08:00
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arch/x86	hv: ept: flush cache for modified ept entries	2019-11-19 09:06:21 +08:00
common	hv: add new hypercall to fetch platform configurations	2019-04-15 22:14:13 +08:00
debug	HV: use term of UUID	2019-04-12 13:45:32 +08:00
dm	hv: Build mptable for guest if VM type is Pre-Launched	2019-04-15 15:51:02 +08:00
hw	hv: move pci.h to include/hw	2019-04-12 10:09:26 +08:00
lib	hv:move 'udelay' to timer.c	2019-03-22 08:38:13 +08:00
public	hv: add new hypercall to fetch platform configurations	2019-04-15 22:14:13 +08:00
hv_debug.h	HV: Added Initial support for SEP/SOCWATCH profiling	2018-10-26 13:39:07 +08:00
hypervisor.h	hv:move 2 APIs from hypervisor.h to guest_memory.c	2019-02-21 10:38:30 +08:00