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31f48d12a2
acrn-hypervisor/hypervisor/arch
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Li Fei1 31f48d12a2 hv: memory order: use mfence to strengthen the fast string operations order 
Use MFENCE to strengthen the fast string operations execute order to ensure
all trampoline code was updated before flush it into the memory.

Tracked-On: #5929
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2021-04-20 13:28:44 +08:00
..
x86 hv: memory order: use mfence to strengthen the fast string operations order 2021-04-20 13:28:44 +08:00