Chenli Wei 33086d5638 misc: fix PCI vUART issue ... The current code can't config PCI vUART by a unified HV Config and there is a conflict between the HV vUART Config and PCI vUART Config. This patch use PCI vUART Config to replace the HV vUART Config when the vUART connection type is PCI and modify the launch scenario to make sure the BDF is correct when user launch post launched VMs. Tracked-On: #6690 Signed-off-by: Chenli Wei <chenli.wei@linux.intel.com>		2022-06-29 13:53:42 +08:00
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lib	misc: configurator: Add entry "None" to HV console selector	2022-05-24 17:14:38 +08:00
bdf.py	config-tools: Fix Enable SR-IOV build fail	2022-05-24 16:07:16 +08:00
board_capability.py	misc: add the define of MAX_IR_ENTRIES	2022-05-20 09:08:47 +08:00
clos.py	misc: move the RDT interface to common library	2022-06-29 13:53:42 +08:00
cpu_affinity.py	config_tools: track whether each vCPU is used for real-time or not	2022-04-21 10:08:53 +08:00
gpa.py	misc: fix PCI vUART issue	2022-06-29 13:53:42 +08:00
guest_flags.py	misc: set PMU_PT flag for pre-launched RTVM	2022-03-29 09:34:17 +08:00
hv_ram.py	misc: modify the HV start address	2022-06-29 13:53:42 +08:00
intx.py	misc: modify the vUART index order and irq	2022-06-29 13:53:42 +08:00
main.py	misc: fix the issue of create hv node	2022-04-28 13:42:54 +08:00
memory_allocator.py	config_tools: update the hugepage algorithm	2022-06-29 13:53:42 +08:00
pio.py	Remove "All rights reserved" string headers	2022-04-06 13:21:02 +08:00
s5_vuart.py	misc: modify the vUART index order and irq	2022-06-29 13:53:42 +08:00