Yonghua Huang 34a6336525 HV: enable L1 cache flush when VM entry ... - flush L1 cache before VM entry only on platform affected by L1TF - flush operation is configurable by below MACRO: --CONFIG_L1D_FLUSH_VMENTRY_ENABLED Tracked-On: #1672 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>		2018-11-01 11:21:15 +08:00
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arch/x86	HV: enable L1 cache flush when VM entry	2018-11-01 11:21:15 +08:00
common	hv: remove deprecated functions declartion	2018-10-31 09:40:07 +08:00
debug	HV:Added SBuf support to copy samples generated to guest.	2018-10-26 13:39:07 +08:00
dm	hv: implement sharing_mode.c for PCI emulation in sharing mode	2018-10-29 14:29:37 +08:00
lib	hv: fix integer violations	2018-10-31 15:01:57 +08:00
public	hv: remove deprecated hypercalls	2018-10-30 09:59:27 +08:00
hv_debug.h	HV: Added Initial support for SEP/SOCWATCH profiling	2018-10-26 13:39:07 +08:00
hypervisor.h	hv: mmu: add pre-assumption for hpa2gpa	2018-10-23 09:12:51 +08:00