Mingqiang Chi 3555aae4ac hv:remove 2 bits vmx capability check ...

remove is_valid_xsave_combination api,
assume the hardware or QEMU can guarantee that support
XSAVE on CPU side and XSAVE_XRSTR on VMX side or not.
will add offline-tool in QEMU platform to avoid the user
use wrong XSAVE configurations.
remov check VMX_PROCBASED_CTLS2_XSVE_XRSTR based on the above reason.
for VMX_PROCBASED_CTLS2_PAUSE_LOOP, now it will panic
if run ACRN over QEMU, here remove it from essential check,
and it will print error information when set this bit
if there is no the hardware capability.

v1-v2:
  remove is_valid_xsave_combination

Tracked-On: #6584
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>

2021-12-13 08:52:52 +08:00

..

boot

HV: fix MISRA violation of _ld_ram_xxx

2021-11-26 16:45:17 +08:00

configs

hv: remove UUID

2021-11-16 14:42:59 +08:00

guest

hv:remove 2 bits vmx capability check

2021-12-13 08:52:52 +08:00

lib

…

seed

ACRN: hv: Terminology modification in hv code

2021-11-02 10:00:55 +08:00

cpu_caps.c

hv:remove 2 bits vmx capability check

2021-12-13 08:52:52 +08:00

cpu_state_tbl.c

HV: treewide: fix violations of coding guideline C-TY-12

2021-11-04 18:15:47 +08:00

cpu.c

hv: vCAT: initialize the emulated_guest_msrs array for CAT msrs during platform initialization

2021-10-26 11:48:27 +08:00

e820.c

hv : encapsulate page align in e820_alloc_memory

2021-11-12 11:56:03 +08:00

exception.c

…

gdt.c

…

idt.S

…

init.c

hv: remove CONFIG_LOG_DESTINATION

2021-12-06 14:24:40 +08:00

ioapic.c

…

irq.c

HV: treewide: fix violations of coding guideline C-TY-27 & C-TY-28

2021-11-04 18:15:47 +08:00

lapic.c

…

mmu.c

HV: fix MISRA violation of _ld_ram_xxx

2021-11-26 16:45:17 +08:00

nmi.c

…

notify.c

ACRN: hv: Terminology modification in hv code

2021-11-02 10:00:55 +08:00

page.c

HV: treewide: fix violations of coding guideline C-EP-05

2021-11-04 18:15:47 +08:00

pagetable.c

…

platform_caps.c

…

pm.c

hv && config-tool: Add compilation option to disable all interrupts in HV

2021-12-10 09:50:17 +08:00

rdt.c

hv: vCAT: initialize vCAT MSRs during vmcs init

2021-10-28 19:12:29 +08:00

rtcm.c

…

sched.S

…

security.c

…

sgx.c

…

trampoline.c

hv: remove CONFIG_LOW_RAM_SIZE

2021-11-12 11:56:03 +08:00

tsc_deadline_timer.c

HV: arch: fix a violation of coding guideline C-TY-24

2021-11-04 18:15:47 +08:00

tsc.c

…

vmx.c

…

vtd.c

hv: align the MAX_IR_ENTRIES to MAX_PT_IRQ_ENTRIES

2021-11-15 09:00:27 +08:00

wakeup.S

…