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77fb21e98c
When HV pass through the P2SB MMIO device to pre-launched VM, vgpio device model traps MMIO access to the GPIO registers within P2SB so that it can expose virtual IOAPIC pins to the VM in accordance with the programmed mappings between gsi and vgsi. Tracked-On: #5246 Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
13 lines
257 B
C
13 lines
257 B
C
/*
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* Copyright (C) 2020 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VGPIO_H
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#define VGPIO_H
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void register_vgpio_handler(struct acrn_vm *vm, const struct acrn_mmiodev *mmiodev);
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#endif /* MMIO_DEV_H */
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