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3c384a489c
On hybrid platform(e.g. ADL), there may be multiple instances of same level caches for different type of processors, The current design only supports one global `rdt_info` for each RDT resource type. In order to support hybrid platform, this patch introduce `rdt_ins` to represents the "instance". Also, the number of `rdt_info` is dynamically generated by config-tool to match with physical board. Tracked-On: projectacrn#6690 Signed-off-by: Tw <wei.tan@intel.com> Acked-by: Eddie Dong <eddie.dong@Intel.com>
42 lines
1005 B
C
42 lines
1005 B
C
/*
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* Copyright (C) 2019 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef BOARD_H
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#define BOARD_H
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#include <types.h>
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#include <board_info.h>
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#include <asm/host_pm.h>
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#include <pci.h>
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#include <misc_cfg.h>
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/* forward declarations */
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struct acrn_vm;
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/* user configured mask and MSR info for each CLOS*/
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union clos_config {
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uint16_t mba_delay;
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uint32_t clos_mask;
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};
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struct vmsix_on_msi_info {
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union pci_bdf bdf;
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uint64_t mmio_base;
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};
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extern struct dmar_info plat_dmar_info;
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#ifdef CONFIG_RDT_ENABLED
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extern union clos_config platform_l2_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES];
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extern union clos_config platform_l3_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES];
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extern union clos_config platform_mba_clos_array[MAX_MBA_CLOS_NUM_ENTRIES];
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#endif
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extern const struct cpu_state_table board_cpu_state_tbl;
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extern const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM];
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extern const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM];
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#endif /* BOARD_H */
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