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3fffa68665
TPAUSE, UMONITOR or UMWAIT instructions execution in guest VM cause
a #UD if "enable user wait and pause" (bit 26) of VMX_PROCBASED_CTLS2
is not set. To fix this issue, set the bit 26 of VMX_PROCBASED_CTLS2.
Besides, these WAITPKG instructions uses MSR_IA32_UMWAIT_CONTROL. So
load corresponding vMSR value during context switch in of a vCPU.
Please note, the TPAUSE or UMWAIT instruction causes a VM exit if the
"RDTSC exiting" and "enable user wait and pause" are both 1. In ACRN
hypervisor, "RDTSC exiting" is always 0. So TPAUSE or UMWAIT doesn't
cause a VM exit.
Performance impact:
MSR_IA32_UMWAIT_CONTROL read costs ~19 cycles;
MSR_IA32_UMWAIT_CONTROL write costs ~63 cycles.
Tracked-On: #6006
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
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| .. | ||
| assign.c | ||
| ept.c | ||
| guest_memory.c | ||
| hyperv.c | ||
| instr_emul.c | ||
| pm.c | ||
| splitlock.c | ||
| trusty.c | ||
| ucode.c | ||
| vcpu.c | ||
| vcpuid.c | ||
| ve820.c | ||
| virq.c | ||
| virtual_cr.c | ||
| vlapic_priv.h | ||
| vlapic.c | ||
| vm_reset.c | ||
| vm.c | ||
| vmcall.c | ||
| vmcs.c | ||
| vmexit.c | ||
| vmsr.c | ||
| vmtrr.c | ||
| vmx_asm.S | ||
| vmx_io.c | ||