Files
acrn-hypervisor/hypervisor
Binbin Wu 41a998fca3 hv: cr: handle control registers related to PCID
1. This patch passes-through CR4.PCIDE to guest VM.

2. This patch handles the invlidation of TLB and the paging-structure caches.
   According to SDM Vol.3 4.10.4.1, the following instructions invalidate
   entries in the TLBs and the paging-structure caches:
   - INVLPG: this instruction is passed-through to guest, no extra handling needed.
   - INVPCID: this instruction is passed-trhough to guest, no extra handling needed.
   - CR0.PG from 1 to 0: already handled by current code, change of CR0.PG will do
     EPT flush.
   - MOV to CR3: hypervisor doesn't trap this instrcution, no extra handling needed.
   - CR4.PGE changed: already handled by current code, change of CR4.PGE will no EPT
     flush.
   - CR4.PCIDE from 1 to 0: this patch handles this case, will do EPT flush.
   - CR4.PAE changed: already handled by current code, change of CR4.PAE will do EPT
     flush.
   - CR4.SEMP from 1 to 0, already handled by current code, change of CR4.SEMP will
     do EPT flush.
   - Task switch: Task switch is not supported in VMX non-root mode.
   - VMX transitions: already handled by current code with the support of VPID.

3. This patch checks the validatiy of CR0, CR4 related to PCID feature.
   According to SDM Vol.3 4.10.1, CR.PCIDE can be 1 only in IA-32e mode.
   - MOV to CR4 causes a general-protection exception (#GP) if it would change CR4.PCIDE
     from 0 to 1 and either IA32_EFER.LMA = 0 or CR3[11:0] ≠ 000H
   - MOV to CR0 causes a general-protection exception if it would clear CR0.PG to 0
     while CR4.PCIDE = 1

Tracked-On: #4296
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-01-02 10:47:34 +08:00
..
2019-12-30 13:43:07 +08:00
2019-09-05 09:58:47 +08:00
2019-07-26 09:10:06 +08:00

ACRN Hypervisor
###############

The open source `Project ACRN`_ defines a device hypervisor reference stack and
an architecture for running multiple software subsystems, managed securely, on
a consolidated system by means of a virtual machine manager. It also defines a
reference framework implementation for virtual device emulation, called the
"ACRN Device Model".

The ACRN Hypervisor is a Type 1 reference hypervisor stack, running directly on
the bare-metal hardware, and is suitable for a variety of IoT and embedded
device solutions. The ACRN hypervisor addresses the gap that currently exists
between datacenter hypervisors, and hard partitioning hypervisors. The ACRN
hypervisor architecture partitions the system into different functional
domains, with carefully selected guest OS sharing optimizations for IoT and
embedded devices.

You can find out more about Project ACRN on the `Project ACRN documentation`_
website.

.. _`Project ACRN`: https://projectacrn.org
.. _`ACRN Hypervisor`: https://github.com/projectacrn/acrn-hypervisor
.. _`Project ACRN documentation`: https://projectacrn.github.io/