acrn-hypervisor/hypervisor/include
Yonghua Huang 442fc30117 hv: refine virtualization flow for cr0 and cr4
- The current code to virtualize CR0/CR4 is not
   well designed, and hard to read.
   This patch reshuffle the logic to make it clear
   and classify those bits into PASSTHRU,
   TRAP_AND_PASSTHRU, TRAP_AND_EMULATE & reserved bits.

Tracked-On: #5586
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-12-18 11:21:22 +08:00
..
arch/x86 hv: refine virtualization flow for cr0 and cr4 2020-12-18 11:21:22 +08:00
common hv: rename hypercall for hv-emulated device management 2020-12-07 16:25:17 +08:00
debug hv: debug: Enable MMIO UART support 2020-08-27 13:31:17 +08:00
dm HV: pci-vuart support create vdev hcall 2020-10-30 20:41:34 +08:00
hw HV: pci-vuart: pci based vuart emulation 2020-10-30 20:41:34 +08:00
lib hv: add functions to initialize vmsix capability 2020-10-26 08:44:13 +08:00
public hv: rename hypercall for hv-emulated device management 2020-12-07 16:25:17 +08:00