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8bec63a6ea
Currently, we hardcode the GPA base of Software SRAM to an address that is derived from TGL platform, as this GPA is identical with HPA for Pre-launch VM, This hardcoded address may not work on other platforms if the HPA bases of Software SRAM are different. Now, Offline tool configures above GPA based on the detection of Software SRAM on specific platform. This patch removes the hardcoding GPA of Software SRAM, and also renames MACRO 'SOFTWARE_SRAM_BASE_GPA' to 'PRE_RTVM_SW_SRAM_BASE_GPA' to avoid confusing, as it is for Prelaunch VM only. Tracked-On: #5649 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
63 lines
1.5 KiB
C
63 lines
1.5 KiB
C
/*
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* Copyright (C) 2020 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef RTCT_H
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#define RTCT_H
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#include <acpi.h>
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#include "misc_cfg.h"
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#define RTCT_ENTRY_TYPE_RTCD_LIMIT 1U
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#define RTCT_ENTRY_TYPE_RTCM_BINARY 2U
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#define RTCT_ENTRY_TYPE_WRC_L3_MASKS 3U
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#define RTCT_ENTRY_TYPE_GT_L3_MASKS 4U
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#define RTCT_ENTRY_TYPE_SOFTWARE_SRAM 5U
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#define RTCT_ENTRY_TYPE_STREAM_DATAPATH 6U
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#define RTCT_ENTRY_TYPE_TIMEAWARE_SUBSYS 7U
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#define RTCT_ENTRY_TYPE_RT_IOMMU 8U
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#define RTCT_ENTRY_TYPE_MEM_HIERARCHY_LATENCY 9U
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#if !defined(PRE_RTVM_SW_SRAM_BASE_GPA)
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/*
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* PRE_RTVM_SW_SRAM_BASE_GPA is for Prelaunch VM only and
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* is configured by config tool on platform that Software SRAM is detected.
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*
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* For cases that Software SRAM is not detected, we still hardcode a dummy
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* placeholder entry in vE820 table of Prelaunch VM to unify the logic
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* to initialize the vE820.
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*/
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#define PRE_RTVM_SW_SRAM_BASE_GPA 0x40080000U
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#endif
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#define PRE_RTVM_SW_SRAM_MAX_SIZE 0x00800000U
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struct rtct_entry {
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uint16_t size;
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uint16_t format;
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uint32_t type;
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uint32_t data[64];
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} __packed;
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struct rtct_entry_data_rtcm_binary
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{
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uint64_t address;
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uint32_t size;
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} __packed;
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struct rtct_entry_data_software_sram
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{
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uint32_t cache_level;
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uint64_t base;
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uint32_t ways;
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uint32_t size;
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uint32_t apic_id_0; /*only the first core is responsible for initialization of L3 mem region*/
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} __packed;
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uint64_t get_software_sram_base(void);
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uint64_t get_software_sram_size(void);
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#endif /* RTCT_H */
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