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f4122d99c5
Replace the BSD-3-Clause boiler plate license text with an SPDX tag. Fixes: #189 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
135 lines
4.0 KiB
C
135 lines
4.0 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* cpuid.h
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*
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* Created on: Jan 4, 2018
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* Author: don
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*/
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#ifndef CPUID_H_
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#define CPUID_H_
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/* CPUID bit definitions */
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#define CPUID_ECX_SSE3 (1<<0)
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#define CPUID_ECX_PCLMUL (1<<1)
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#define CPUID_ECX_DTES64 (1<<2)
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#define CPUID_ECX_MONITOR (1<<3)
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#define CPUID_ECX_DS_CPL (1<<4)
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#define CPUID_ECX_VMX (1<<5)
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#define CPUID_ECX_SMX (1<<6)
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#define CPUID_ECX_EST (1<<7)
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#define CPUID_ECX_TM2 (1<<8)
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#define CPUID_ECX_SSSE3 (1<<9)
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#define CPUID_ECX_CID (1<<10)
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#define CPUID_ECX_FMA (1<<12)
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#define CPUID_ECX_CX16 (1<<13)
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#define CPUID_ECX_ETPRD (1<<14)
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#define CPUID_ECX_PDCM (1<<15)
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#define CPUID_ECX_DCA (1<<18)
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#define CPUID_ECX_SSE4_1 (1<<19)
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#define CPUID_ECX_SSE4_2 (1<<20)
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#define CPUID_ECX_x2APIC (1<<21)
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#define CPUID_ECX_MOVBE (1<<22)
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#define CPUID_ECX_POPCNT (1<<23)
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#define CPUID_ECX_AES (1<<25)
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#define CPUID_ECX_XSAVE (1<<26)
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#define CPUID_ECX_OSXSAVE (1<<27)
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#define CPUID_ECX_AVX (1<<28)
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#define CPUID_EDX_FPU (1<<0)
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#define CPUID_EDX_VME (1<<1)
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#define CPUID_EDX_DE (1<<2)
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#define CPUID_EDX_PSE (1<<3)
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#define CPUID_EDX_TSC (1<<4)
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#define CPUID_EDX_MSR (1<<5)
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#define CPUID_EDX_PAE (1<<6)
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#define CPUID_EDX_MCE (1<<7)
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#define CPUID_EDX_CX8 (1<<8)
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#define CPUID_EDX_APIC (1<<9)
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#define CPUID_EDX_SEP (1<<11)
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#define CPUID_EDX_MTRR (1<<12)
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#define CPUID_EDX_PGE (1<<13)
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#define CPUID_EDX_MCA (1<<14)
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#define CPUID_EDX_CMOV (1<<15)
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#define CPUID_EDX_PAT (1<<16)
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#define CPUID_EDX_PSE36 (1<<17)
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#define CPUID_EDX_PSN (1<<18)
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#define CPUID_EDX_CLF (1<<19)
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#define CPUID_EDX_DTES (1<<21)
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#define CPUID_EDX_ACPI (1<<22)
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#define CPUID_EDX_MMX (1<<23)
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#define CPUID_EDX_FXSR (1<<24)
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#define CPUID_EDX_SSE (1<<25)
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#define CPUID_EDX_SSE2 (1<<26)
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#define CPUID_EDX_SS (1<<27)
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#define CPUID_EDX_HTT (1<<28)
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#define CPUID_EDX_TM1 (1<<29)
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#define CPUID_EDX_IA64 (1<<30)
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#define CPUID_EDX_PBE (1<<31)
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/* CPUID.07H:EBX.TSC_ADJUST*/
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#define CPUID_EBX_TSC_ADJ (1<<1)
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/* CPUID.07H:EDX.IBRS_IBPB*/
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#define CPUID_EDX_IBRS_IBPB (1<<26)
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/* CPUID.07H:EDX.STIBP*/
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#define CPUID_EDX_STIBP (1<<27)
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/* CPUID.80000001H:EDX.Page1GB*/
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#define CPUID_EDX_PAGE1GB (1<<26)
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/* CPUID.07H:EBX.INVPCID*/
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#define CPUID_EBX_INVPCID (1<<10)
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/* CPUID.01H:ECX.PCID*/
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#define CPUID_ECX_PCID (1<<17)
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/* CPUID source operands */
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#define CPUID_VENDORSTRING 0
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#define CPUID_FEATURES 1
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#define CPUID_TLB 2
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#define CPUID_SERIALNUM 3
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#define CPUID_EXTEND_FEATURE 7
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#define CPUID_MAX_EXTENDED_FUNCTION 0x80000000
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#define CPUID_EXTEND_FUNCTION_1 0x80000001
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#define CPUID_EXTEND_FUNCTION_2 0x80000002
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#define CPUID_EXTEND_FUNCTION_3 0x80000003
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#define CPUID_EXTEND_FUNCTION_4 0x80000004
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#define CPUID_EXTEND_ADDRESS_SIZE 0x80000008
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static inline void __cpuid(uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx)
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{
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/* Execute CPUID instruction and save results */
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asm volatile("cpuid":"=a"(*eax), "=b"(*ebx),
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"=c"(*ecx), "=d"(*edx)
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: "0" (*eax), "2" (*ecx)
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: "memory");
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}
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static inline void cpuid(uint32_t leaf,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx)
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{
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*eax = leaf;
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*ecx = 0;
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__cpuid(eax, ebx, ecx, edx);
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}
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static inline void cpuid_subleaf(uint32_t leaf, uint32_t subleaf,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx)
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{
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*eax = leaf;
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*ecx = subleaf;
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__cpuid(eax, ebx, ecx, edx);
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}
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int set_vcpuid_entries(struct vm *vm);
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void guest_cpuid(struct vcpu *vcpu,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx);
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#endif /* CPUID_H_ */
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