Files
acrn-hypervisor/hypervisor
Li Fei1 4b6dd19ad1 hv: pci: rename CFG read/write function for PCI-compatible Configuration Mechanism
Move CFG read/write function for PCI-compatible Configuration Mechanism from
debug/uartuart16550.c to hw/pci.c and rename CFG read/write function for
PCI-compatible Configuration Mechanism to pci_pio_read/write_cfg to align with
CFG read/write function pci_mmcfg_read/write_cfg for PCI Express Enhanced
Configuration Access Mechanism.

Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-03-12 09:17:02 +08:00
..
2020-02-26 09:24:16 +08:00
2019-09-05 09:58:47 +08:00
2020-03-09 13:28:31 +08:00

ACRN Hypervisor
###############

The open source `Project ACRN`_ defines a device hypervisor reference stack and
an architecture for running multiple software subsystems, managed securely, on
a consolidated system by means of a virtual machine manager. It also defines a
reference framework implementation for virtual device emulation, called the
"ACRN Device Model".

The ACRN Hypervisor is a Type 1 reference hypervisor stack, running directly on
the bare-metal hardware, and is suitable for a variety of IoT and embedded
device solutions. The ACRN hypervisor addresses the gap that currently exists
between datacenter hypervisors, and hard partitioning hypervisors. The ACRN
hypervisor architecture partitions the system into different functional
domains, with carefully selected guest OS sharing optimizations for IoT and
embedded devices.

You can find out more about Project ACRN on the `Project ACRN documentation`_
website.

.. _`Project ACRN`: https://projectacrn.org
.. _`ACRN Hypervisor`: https://github.com/projectacrn/acrn-hypervisor
.. _`Project ACRN documentation`: https://projectacrn.github.io/