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4e17d2076c
MISRA-C states that redundant code reduce the maintainability of code. In some cases, we would like to keep the current unused static functions for code completeness, such as checking register info. These functions might be used later. This patch removes the unused static function 'mmu_pt_for_pde'. Looks like it is legacy code and not being used in our project. Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Li, Fei1 <fei1.li@intel.com>
146 lines
4.1 KiB
C
146 lines
4.1 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef MMU_H
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#define MMU_H
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/** The flag that indicates that the page fault was caused by a non present
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* page.
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*/
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#define PAGE_FAULT_P_FLAG 0x00000001U
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/** The flag that indicates that the page fault was caused by a write access. */
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#define PAGE_FAULT_WR_FLAG 0x00000002U
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/** The flag that indicates that the page fault was caused in user mode. */
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#define PAGE_FAULT_US_FLAG 0x00000004U
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/** The flag that indicates that the page fault was caused by a reserved bit
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* violation.
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*/
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#define PAGE_FAULT_RSVD_FLAG 0x00000008U
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/** The flag that indicates that the page fault was caused by an instruction
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* fetch.
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*/
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#define PAGE_FAULT_ID_FLAG 0x00000010U
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/* Defines used for common memory sizes */
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#define MEM_1K 1024U
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#define MEM_2K (MEM_1K * 2U)
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#define MEM_4K (MEM_1K * 4U)
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#define MEM_1M (MEM_1K * 1024U)
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#define MEM_2M (MEM_1M * 2U)
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#define MEM_1G (MEM_1M * 1024U)
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#ifndef ASSEMBLER
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#include <cpu.h>
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/* Define cache line size (in bytes) */
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#define CACHE_LINE_SIZE 64U
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/* IA32E Paging constants */
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#define IA32E_REF_MASK \
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(boot_cpu_data.physical_address_mask)
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static inline uint64_t round_page_up(uint64_t addr)
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{
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return (((addr + (uint64_t)CPU_PAGE_SIZE) - 1UL) & CPU_PAGE_MASK);
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}
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static inline uint64_t round_page_down(uint64_t addr)
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{
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return (addr & CPU_PAGE_MASK);
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}
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enum _page_table_type {
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PTT_PRIMARY = 0, /* Mapping for hypervisor */
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PTT_EPT = 1,
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};
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/* Represent the 4 levels of translation tables in IA-32e paging mode */
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enum _page_table_level {
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IA32E_PML4 = 0,
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IA32E_PDPT = 1,
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IA32E_PD = 2,
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IA32E_PT = 3,
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};
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/* Page size */
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#define PAGE_SIZE_4K MEM_4K
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#define PAGE_SIZE_2M MEM_2M
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#define PAGE_SIZE_1G MEM_1G
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uint64_t get_paging_pml4(void);
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void *alloc_paging_struct(void);
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void free_paging_struct(void *ptr);
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void enable_paging(uint64_t pml4_base_addr);
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void enable_smep(void);
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void init_paging(void);
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int mmu_add(uint64_t *pml4_page, uint64_t paddr_base,
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uint64_t vaddr_base, uint64_t size,
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uint64_t prot, enum _page_table_type ptt);
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int mmu_modify_or_del(uint64_t *pml4_page,
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uint64_t vaddr_base, uint64_t size,
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uint64_t prot_set, uint64_t prot_clr,
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enum _page_table_type ptt, uint32_t type);
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int check_vmx_mmu_cap(void);
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uint16_t allocate_vpid(void);
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void flush_vpid_single(uint16_t vpid);
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void flush_vpid_global(void);
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void invept(struct vcpu *vcpu);
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bool check_continuous_hpa(struct vm *vm, uint64_t gpa_arg, uint64_t size_arg);
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uint64_t *lookup_address(uint64_t *pml4_page, uint64_t addr,
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uint64_t *pg_size, enum _page_table_type ptt);
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#pragma pack(1)
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/** Defines a single entry in an E820 memory map. */
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struct e820_entry {
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/** The base address of the memory range. */
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uint64_t baseaddr;
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/** The length of the memory range. */
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uint64_t length;
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/** The type of memory region. */
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uint32_t type;
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};
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#pragma pack()
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/* E820 memory types */
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#define E820_TYPE_RAM 1U /* EFI 1, 2, 3, 4, 5, 6, 7 */
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#define E820_TYPE_RESERVED 2U
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/* EFI 0, 11, 12, 13 (everything not used elsewhere) */
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#define E820_TYPE_ACPI_RECLAIM 3U /* EFI 9 */
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#define E820_TYPE_ACPI_NVS 4U /* EFI 10 */
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#define E820_TYPE_UNUSABLE 5U /* EFI 8 */
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static inline void cache_flush_invalidate_all(void)
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{
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asm volatile (" wbinvd\n" : : : "memory");
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}
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static inline void clflush(volatile void *p)
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{
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asm volatile ("clflush (%0)" :: "r"(p));
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}
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/* External Interfaces */
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void destroy_ept(struct vm *vm);
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uint64_t gpa2hpa(const struct vm *vm, uint64_t gpa);
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uint64_t local_gpa2hpa(const struct vm *vm, uint64_t gpa, uint32_t *size);
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uint64_t hpa2gpa(const struct vm *vm, uint64_t hpa);
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int ept_mr_add(const struct vm *vm, uint64_t *pml4_page, uint64_t hpa,
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uint64_t gpa, uint64_t size, uint64_t prot_orig);
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int ept_mr_modify(const struct vm *vm, uint64_t *pml4_page, uint64_t gpa,
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uint64_t size, uint64_t prot_set, uint64_t prot_clr);
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int ept_mr_del(const struct vm *vm, uint64_t *pml4_page, uint64_t gpa,
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uint64_t size);
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void free_ept_mem(uint64_t *pml4_page);
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int ept_violation_vmexit_handler(struct vcpu *vcpu);
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int ept_misconfig_vmexit_handler(__unused struct vcpu *vcpu);
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#endif /* ASSEMBLER not defined */
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#endif /* MMU_H */
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