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https://github.com/projectacrn/acrn-hypervisor.git
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55d9161138
This patch emulates VMXON instruction. Basically checks some prerequisites to enable VMX operation on L1 guest (next patch), and prepares some virtual hardware environment in L0. Tracked-On: #5923 Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com> Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@Intel.com>
91 lines
2.2 KiB
C
91 lines
2.2 KiB
C
/*
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* Copyright (C) 2021 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef NESTED_H
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#define NESTED_H
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#include <lib/errno.h>
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/* helper data structure to make VMX capability MSR manipulation easier */
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union value_64 {
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uint64_t full;
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struct {
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uint32_t lo_32;
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uint32_t hi_32;
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} u;
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};
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/*
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* Following MSRs are supported if nested virtualization is enabled
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* - If CONFIG_NVMX_ENABLED is set, these MSRs are included in emulated_guest_msrs[]
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* - otherwise, they are included in unsupported_msrs[]
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*/
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#define NUM_VMX_MSRS 20U
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#define LIST_OF_VMX_MSRS \
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MSR_IA32_SMBASE, \
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MSR_IA32_VMX_BASIC, \
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MSR_IA32_VMX_PINBASED_CTLS, \
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MSR_IA32_VMX_PROCBASED_CTLS, \
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MSR_IA32_VMX_EXIT_CTLS, \
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MSR_IA32_VMX_ENTRY_CTLS, \
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MSR_IA32_VMX_MISC, \
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MSR_IA32_VMX_CR0_FIXED0, \
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MSR_IA32_VMX_CR0_FIXED1, \
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MSR_IA32_VMX_CR4_FIXED0, \
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MSR_IA32_VMX_CR4_FIXED1, \
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MSR_IA32_VMX_VMCS_ENUM, \
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MSR_IA32_VMX_PROCBASED_CTLS2, \
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MSR_IA32_VMX_EPT_VPID_CAP, \
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MSR_IA32_VMX_TRUE_PINBASED_CTLS, \
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MSR_IA32_VMX_TRUE_PROCBASED_CTLS, \
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MSR_IA32_VMX_TRUE_EXIT_CTLS, \
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MSR_IA32_VMX_TRUE_ENTRY_CTLS, \
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MSR_IA32_VMX_VMFUNC, \
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MSR_IA32_VMX_PROCBASED_CTLS3
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/*
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* This VMCS12 revision id is chosen arbitrarily.
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* The emulated MSR_IA32_VMX_BASIC returns this ID in bits 30:0.
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*/
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#define VMCS12_REVISION_ID 0x15407E12U
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enum VMXResult {
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VMsucceed,
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VMfailValid,
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VMfailInvalid,
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};
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void nested_vmx_result(enum VMXResult, int error_number);
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int32_t vmxon_vmexit_handler(struct acrn_vcpu *vcpu);
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#ifdef CONFIG_NVMX_ENABLED
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struct acrn_nested {
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bool vmxon; /* To indicate if vCPU entered VMX operation */
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} __aligned(PAGE_SIZE);
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bool is_vmx_msr(uint32_t msr);
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void init_vmx_msrs(struct acrn_vcpu *vcpu);
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int32_t read_vmx_msr(__unused struct acrn_vcpu *vcpu, uint32_t msr, uint64_t *val);
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#else
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struct acrn_nested {};
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static inline bool is_vmx_msr(__unused uint32_t msr)
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{
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/*
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* if nested virtualization is disabled, return false so that
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* it can be treated as unsupported MSR.
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*/
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return false;
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}
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static inline void init_vmx_msrs(__unused struct acrn_vcpu *vcpu) {}
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static inline int32_t read_vmx_msr(__unused struct acrn_vcpu *vcpu,
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__unused uint32_t msr, __unused uint64_t *val)
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{
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return -EACCES;
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}
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#endif /* CONFIG_NVMX_ENABLED */
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#endif /* NESTED_H */
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